verification technologies---code coverage 代码覆盖率

Code coverage is a technology that can identify what code has been(and more importantly not been) executed in the design under verification.

代码覆盖包括：语句覆盖（块覆盖），路径覆盖，表达式覆盖，FSM覆盖。

代码覆盖过程：original model →pre-processor→instrumneted model→simulation engine→metrics database→report generator→coverage metrics

The source code is first instrumented. The instrumentation process simply adds checkpoints at strategic locations of the source code to record whether a particular construct has been exercised. The instrumented code is then simulated normally using all available, uninstrumented, testbenches. The cumulative traces from all simulations are collected into a database. From that database,reports can be generated to measure various coverage metrics of the verification suite on the design.

 

Statement Coverage:

Statement coverage can also be called block coverage, where a block is a sequence of statements that are executed if a single statement is executed.Statement, line or block coverage measures how much of the total lines of code were executed by the verification suite. A graphical user interface usually lets the user browse the source code and quickly identify the statements that were not executed.

If the conditions that would cause the uncovered statements to be executed should have been verified, it is an indication that one or more testbenches are either not functionally correct or incomplete.If the condition was entirely forgotten, it is necessary to add to an existing testbench, create an entirely new one or make additional runs with different seeds.

 

Path Coverage:

Path coverage measures all possible ways you can execute a sequence of statements. it is necessary to determine the conditions that cause the uncovered path to be executed.

 

Expression Coverage:it is necessary to understand why a controlling term of an expression has not been exercised.

 

FSM Coverage:

Because each state in an FSM is usually explicitly coded using a choice in a case statement, any unvisited state will be clearly identifiable through uncovered statements.

 

FSM coverage cannot identify unintended or missing transitions.

The state corresponding to an uncovered case statement choice was not visited during verification.The transitions identified by FSM coverage tools are automatically extracted from the implementation of the FSM. There is no way for the coverage tool to determine whether a transition was part of the intent, or if an intended transition is missing. It is important to review the extracted state transitions to ensure that only and all intended transitions are present.

 

What Does 100 Percent Code Coverage Mean?

The short answer is: The entire design implementation was executed. Code coverage indicates how thoroughly your entire verification suite exercises the source code. But it does not provide an indication, in any way, about the correctness or completeness of the verification suite.

 

Code coverage indicates if the verification task is  not complete through low coverage numbers. A high coverage number is by no means an indication that the job is over. Code coverage is an additional
indicator for the completeness of  the verification job. It can help increase your confidence that the verification job is complete, but it should not be your only indicator.