timing verification--Removal Timing Check

A removal timing check ensures that there is adequate time between an active clock edge and the release of an asynchronous control signal. The check ensures that the active clock edge has no effect because the asynchronous control signal remains active until removal time after the active clock edge. In other words, the asynchronous control signal is released (becomes inactive) well after the active clock edge so that the clock edge can have no effect. This is illustrated in Figure 8-20. This check is based on the removal time specified for the asynchronous pin of the flip-flop. Here is an excerpt from the cell library description corresponding to the removal check.

pin(CDN) {
. . .
timing() {
related_pin : "CK";
timing_type : removal_rising;
. . .
}
}

Like a hold check, it is a min path check except that it is on an asynchronous pin of a flip-flop.

      

     

The Endpoint shows that it is removal check. It is on the asynchronous pin CDN of flip-flop UFF6. The removal time for this flip-flop is listed as library
removal time with a value of 0.19ns. All asynchronous timing checks are assigned to the async default path group.