Quartus警告：Critical Warning: The following clock transfers have no clock uncertainty assignment.

Critical
Warning: The following clock transfers have no clock uncertainty
assignment. For more accurate results, apply clock uncertainty
assignments or use the derive_clock_uncertainty command.
Critical Warning: From altera_reserved_tck (Rise) to altera_reserved_tck (Rise) (setup and hold)
Critical Warning: From altera_reserved_tck (Rise) to altera_reserved_tck (Fall) (setup and hold)
Critical Warning: From altera_reserved_tck (Fall) to altera_reserved_tck (Fall) (setup and hold)

参考了很多文献。Altera上说是时序问题，并提供了如下解决方法：

Solution
The altera_reserved_tck pin is automatically generated for a design that uses a JTAG accessible module such as the SignalTap? II logic analyzer,the In-System Memory Content Editor or the Nios? II debugger.To constrain this JTAG clock, apply a 10-MHz clock constraint to this pin.For the TimeQuest Timing Analyzer, use the following command:create_clock -period "100.000 ns" -name {altera_reserved_tck} {altera_reserved_tck}For the Quartus? II Classic Timing Analyzer, use the following command:
set_global_assignment -name FMAX_REQUIREMENT "10 MHz" -section_id altera_reserved_tck
set_instance_assignment -name CLOCK_SETTINGS altera_reserved_tck -to altera_reserved_tck
Any datapaths crossing into the altera_reserved_tck clock domain from another domain can be set as false paths. Similarly any datapaths crossing from the altera_reserved_tck domain to another domain can also be set as false paths.

好像有些人用了这个方法之后有效果。但是我的没有效果。有另外搜索了好多。实验了很多次，尽管使用的命令各不相同，但是大家一致认为这个事是时序约束没做好的问题，跟使用JTAG有关系。最后找到一片博文：http://blog.sina.com.cn/s/blog_436c7ed30100lu1q.html
set_clock_uncertainty -setup -rise_from altera_reserved_tck -rise_to altera_reserved_tck 0.150
set_clock_uncertainty -hold -rise_from altera_reserved_tck -rise_to altera_reserved_tck 0.150
set_clock_uncertainty -setup -rise_from altera_reserved_tck -fall_to altera_reserved_tck 0.150
set_clock_uncertainty -hold -rise_from altera_reserved_tck -fall_to altera_reserved_tck 0.150
set_clock_uncertainty -setup -fall_from altera_reserved_tck -fall_to altera_reserved_tck 0.150
set_clock_uncertainty -hold -fall_from altera_reserved_tck -fall_to altera_reserved_tck 0.150
这几句话添加上去，就没有Warning了。

 

quartus II 全编译出现严重警告按以下方式解决：

首先看命令 derive_clock_uncertainty 的帮助，再根据自己的问题在*.sdc文件中加入

set_clock_uncertainty  -setup -rise_from Clock -rise_to Clock 0.150

set_clock_uncertainty  -hold -rise_from Clock -rise_to Clock 0.150

保存，重新编译。严重警告就消失了。