Using XILINX IP Core Block RAM (3)

1. The problems during the debugging process
   1) Q:How to use the IP core and what the appropriate way to solve it ?
   A:Using the the help document of ISE 14.7, also using the datasheet from the official website of Xilinx.Searching the measures from the Xilinx website .
   2) Q:Why there is nothing data in fist time when i download the bits file into FPGA?
   A:Because the system functiom $readmenh is can not be synthesized,so i had to rewrite the program and only using the *.coe file initial Block RAM and search the number in temporary Memory.
   3) Q: How to use the Modelsim,ISE,and Ultraeditor coordinately ?
   A:Using them independently,and create files for each type of files in program.for instance,the .src is used to store source document ,.tb is used to store testbench files ,.data used to store the data files,and the .project is used for the ISE software. The files as shown in Figure 8.