【IC】IEDM 2024

数字设计后端工程师需要看的：
session1、2、3、7、21、28、31、

Session 1 Keynote

9:00 AM Grand Ballroom B

1-1: Semiconductor Industry Outlook and New Technology Frontiers

Yuh-Jier Mii, TSMC

1-2: Advancing AI with Energy-Efficient Architectures: Innovations in Fab Process, Packaging, and System Integration

Mark Fuselier, Advanced Micro Devices (AMD) Inc.│L. Bair, Advanced Micro Devices (AMD) Inc.│J. Wuu, Advanced Micro Devices (AMD) Inc.

1-3: Revolutionizing Power Electronics with Silicon Carbide to Pioneer Sustainable Solutions

Elif Balkas, Wolfspeed

Session 2 Advanced Logic Technology (ALT) | Gate-All-Around and 3D Stacked Transistors

1:30 PM Grand Ballroom A

Co-Chairs: Maureen Wang, TSMC and Chung-Hsun Lin, Intel

2-1: 2nm Platform Technology featuring Energy-efficient Nanosheet Transistors and Interconnects co-optimized with 3DIC for AI, HPC and Mobile SoC Applications

Geoffrey Yeap, TSMC│SS Lin, TSMC│HL Shang, TSMC│HC Lin, TSMC│YC Peng, TSMC│M Wang, TSMC│PW Wang, TSMC│CP Lin, TSMC│CP Lin, TSMC│KF Yu, TSMC│WY Lee, TSMC│HK Chen, TSMC│DW Lin, TSMC│BR Yang, TSMC│CC Yeh, TSMC│C-T Chan, TSMC│JM Kuo, TSMC│C-M Liu, TSMC│T-H Chiu, TSMC│M-C Wen, TSMC│TL Lee, TSMC│CY Chang, TSMC│R Chen, TSMC│P-H Huang, TSMC│CS Hou, TSMC│YK Lin, TSMC│FK Yang, TSMC│J Wang, TSMC│S Fung, TSMC│Ryan Chen, TSMC│CH Lee, TSMC│TL Lee, TSMC│W Chang, TSMC│DY Lee, TSMC│CY Ting, TSMC│T Chang, TSMC│HC Huang, TSMC│HJ Lin, TSMC│C Tseng, TSMC│CW Chang, TSMC│KB Haung, TSMC│YC Lu, TSMC│C-H Chen, TSMC│CO Chui, TSMC│KW Chen, TSMC│MH Tsai, TSMC│CC Chen, TSMC│N. Wu, TSMC│HT Chiang, TSMC│XM Chen, TSMC│SH Sun, TSMC│JT Tzeng, TSMC│K wang, TSMC│YC Peng, TSMC│HJ Liao, TSMC│T Chen, TSMC│YK Cheng, TSMC│J Chang, TSMC│K Hsieh, TSMC│A Chang, TSMC│G Liu, TSMC│A Chen, TSMC│HT Lin, TSMC│KC Chiang, TSMC│CW Tsai, TSMC│H Wang, TSMC│W Sheu, TSMC│J Yeh, TSMC│YM Chen, TSMC│CK Lin, TSMC│J Wu, TSMC│M Cao, TSMC│LS Juang, TSMC│F Lai, TSMC│Y Ku, TSMC│SM Jang, TSMC│LC Lu, TSMC

2-2: Silicon RibbonFET CMOS at 6nm Gate Length

Ashish Agrawal, Intel Corporation│Wriddhi Chakraborty, Intel Corporation│Wenshen Li, Intel Corporation│Hojoon Ryu, Intel Corporation│Brian Markman, Intel Corporation│Seung Hoon Sung, Intel Corporation│Rajat Paul, Intel Corporation│Cheng-Ying Huang, Intel Corporation│Su-Min Choi, Intel Corporation│Kyeong Rho, Intel Corporation│Andrew Shu, Intel Corporation│Raul Iglesias, Intel Corporation│Patrick Wallace, Intel Corporation│Susmita Ghose, Intel Corporation│Joshua Hockel, Intel Corporation│Kai Loon Cheong, Intel Corporation│Rachel Thorman, Intel Corporation│Lukas Baumgartel, Intel Corporation│Leah Shoer, Intel Corporation│Varun Mishra, Intel Corporation│Salim Berrada, Intel Corporation│Cory Weber, Intel Corporation│Borna Obradovic, Intel Corporation│Adedapo Oni, Intel Corporation│A Ashita, Intel Corporation│Zachary Brooks, Intel Corporation│Noel Franco, Intel Corporation│Jack Kavalieros, Intel Corporation│Gilbert Dewey, Intel Corporation

2-3: Advanced Multi-Vt Enabled by Selective Layer Reductions for 2nm Nanosheet Technology and Beyond

Ruqiang Bao, IBM Research│Yusuke Oniki, Rapidus US, LLC│Xiaoli He, IBM Research│Yasuhiro Isobe, Rapidus US, LLC│Prateek Hundekar, IBM Research│Seiji Matsuyama, Rapidus US, LLC│Sylvie Mignot, IBM Research│Alma Ramirez, IBM Research│Shohei Kawamoto, Rapidus US, LLC│Hiroshi Abe, Rapidus US, LLC│Anthony Chou, IBM Research│Will Parkin, IBM Research│Tatsufumi Hamada, Rapidus US, LLC│Muthumanickam Sankarapandian, IBM Research│Paul Jamison, IBM Research│Alexander Reznicek, IBM Research│Sriharsha Sudhindra, IBM Research│Yuji Murakami, Rapidus US, LLC│Trevor McDonough, IBM Research│Sushant Kumar, IBM Research│Wayne Zhao, IBM Research│HUIMEI ZHOU, IBM Research│Juntao Li, IBM Research│Govind Bajpai, IBM Research│ERIC MILLER, IBM Research│INDIRA SESHADRI, IBM Research│Liqiao Qin, IBM Research│Charlotte Adams, IBM Research│Miaomiao Wang, IBM Research│Yu Zhu, IBM Research│BROWN PEETHALA, IBM Research│DK Sohn, IBM Research│Mark Lagus, IBM Research│Kai Zhao, IBM Research│Renee Mo, IBM Research│Effendi Leobandung, IBM Research│Dechao Guo, IBM Research│Yuzo Fukuzaki, Rapidus US, LLC│Huiming Bu, IBM Research

2-4: Double-Row CFET: Design Technology Co-Optimization for Area Efficient A7 Technology Node

Halil Kukner, imec│Gioele Mirabelli, imec│Sheng Yang, imec│Lynn Verschueren, imec│Juergen Boemmels, imec│Ji-Yung Lin, imec│Dawit Abdi, imec│Anita Farokhnejad, imec│Odysseas Zografos, imec│Naoto Horiguchi, imec│Marie Garcia Bardon, imec│Geert Hellings, imec│Julien Ryckaert, imec

2-5: First Demonstration of Monolithic CFET Inverter at 48nm Gate Pitch Toward Future Logic Technology Scaling

Szuya Liao, Taiwan Semiconductor Manufacturing Company│Lu Yang, Taiwan Semiconductor Manufacturing Company│Wei-Xiang You, Taiwan Semiconductor Manufacturing Company│Ting-Yun Wu, Taiwan Semiconductor Manufacturing Company│Yi-Che Lee, Taiwan Semiconductor Manufacturing Company│Tsung-Kai Chiu, Taiwan Semiconductor Manufacturing Company│James Hsu, Taiwan Semiconductor Manufacturing Company│Wei-Der Ho, Taiwan Semiconductor Manufacturing Company│Yuan-Chi Yang, Taiwan Semiconductor Manufacturing Company│Ming-Chang Tsai, Taiwan Semiconductor Manufacturing Company│Hsin Yang Hung, Taiwan Semiconductor Manufacturing Company│Rui-Fu Chen, Taiwan Semiconductor Manufacturing Company│Yi-Hsuan Li, Taiwan Semiconductor Manufacturing Company│Shao-Tse Huang, Taiwan Semiconductor Manufacturing Company│Ching Yen Lee, Taiwan Semiconductor Manufacturing Company│Ku-Feng Yang, Taiwan Semiconductor Manufacturing Company│Kuan-Kan Hu, Taiwan Semiconductor Manufacturing Company│Yu-Hsien Chiang, Taiwan Semiconductor Manufacturing Company│Hung-Kun Lo, Taiwan Semiconductor Manufacturing Company│Shih-Jung Ho, Taiwan Semiconductor Manufacturing Company│Chu-Hsuan Sha, Taiwan Semiconductor Manufacturing Company│Jin-Hao Jhang, Taiwan Semiconductor Manufacturing Company│Guan-Ren Wang, Taiwan Semiconductor Manufacturing Company│Chun-Yu Liu, Taiwan Semiconductor Manufacturing Company│Wei-Yen Woon, Taiwan Semiconductor Manufacturing Company│Cheng-Ming Lin, Taiwan Semiconductor Manufacturing Company│Szu-Hua Chen, Taiwan Semiconductor Manufacturing Company│Kai-Chieh Yang, Taiwan Semiconductor Manufacturing Company│Je-Ruei Wen, Taiwan Semiconductor Manufacturing Company│Chia-Min Chang, Taiwan Semiconductor Manufacturing Company│Yu-Tien Shen, Taiwan Semiconductor Manufacturing Company│Pinyen Lin, Taiwan Semiconductor Manufacturing Company│Chi-Ming Yang, Taiwan Semiconductor Manufacturing Company│Wei-Yip Loh, Taiwan Semiconductor Manufacturing Company│Gene Tsai, Taiwan Semiconductor Manufacturing Company│Chih Hung Chen, Taiwan Semiconductor Manufacturing Company│Richard Chen, Taiwan Semiconductor Manufacturing Company│Min Cao, Taiwan Semiconductor Manufacturing Company

2-6: WNxCy VT Tuning of Split Gate Nanosheet CFETs with Dual Work Function Metals Achieving 0.93 VT Match/ Improved 0.24V Noise Margin/ Record Gain of 61V/V

Bo-Wei Huang, Graduate Institute of Electronics Engineering, National Taiwan University│Chun-Yi Cheng, Graduate Institute of Electronics Engineering, National Taiwan University│Wan-Hsuan Hsieh, Graduate Institute of Electronics Engineering, National Taiwan University│Yu-Rui Chen, Graduate Institute of Electronics Engineering, National Taiwan University│Wei-Jen Chen, Graduate Institute of Electronics Engineering, National Taiwan University│Yi-Chun Liu, Graduate Institute of Electronics Engineering, National Taiwan University│Min-Kuan Lin, Graduate School of Advanced Technology, National Taiwan University│Ying-Qi Liu, Graduate School of Advanced Technology, National Taiwan University│Hao-Yi Lu, Graduate School of Advanced Technology, National Taiwan University│Yi Huang, Graduate Institute of Photonics and Optoelectronics, National Taiwan University│Ding-Wei Lin, Graduate Institute of Electronics Engineering, National Taiwan University│Chee Wee Liu, Graduate Institute of Electronics Engineering, National Taiwan University

2-7: Monolithic-CFET with Direct Backside Contact to Source/Drain and Backside Dielectric Isolation

Anne Vandooren, imec│Karen Stiers, imec│Cassie Sheng, imec│Camila Toledo de Carvalho Cavalcante, imec│Maryam Hosseini, imec│Dmitry Batuk, imec│Andy Peng, imec│Daisy Zhou, imec│Hans Mertens, imec│Anabela Veloso, imec│Andrea Mingardi, imec│Sujan Sarkar Kumar, imec│Rajendra Kumar Saroj, imec│Koen D’havé, imec│Thomas Chiarella, imec│Juergen Bömmels, imec│Roger Loo, imec│Erik Rosseel, imec│Clement Porret, imec│Yosuke Shimura, imec│Anjani Akula, imec│Subhobroto Choudhury, imec│Vincent Brissonneau, imec│Emmanuel Dupuy, imec│Tanushree Sarkar, imec│Nathali Franchina Vergel, imec│Anthony Peter, imec│Nicolas Jourdan, imec│Jean-Philippe Soulie, imec│Kevin Vandersmissen, imec│Serena Iacovo, imec│Daniel Montero Alvarez, imec│Evi Vrancken, imec│Farid Sebaai, imec│Pallavi Puttarame Gowda, imec│Kenneth Lai, imec│Nunzio Buccheri, imec│Philippe Matagne, imec│B.T. Chan, imec│Alfonso Sepulveda Marquez, imec│Robert Langer, imec│Il Gyo Koo, imec│Efrain Altamirano Sanchez, imec│Katia Devriendt, imec│Paulina Rincon Delgadillo, imec│Frederic Lazzarino, imec│Jerome Mitard, imec│Jef. Geypen, imec│Eva Grieten, imec│Yi-Fan Chen, imec│Frederik Verbeek, imec│Hans Pollenus, imec│Jeroen Heijlen, imec│Lucas Petersen Barbosa Lima, imec│Frank Holsteyns, imec│Sujith Subramanian, imec│Naoto Horiguchi, imec│Steven Demuynck, imec│Serge Biesemans, imec

2-8: Monolithic Stacked FET with Stepped Channels for Future Logic Technologies

Chen Zhang, IBM Research│SeungMin Song, Samsung Electronics│Jay Strane, IBM Research│Lijuan Zou, IBM Research│Seungchan Yun, Samsung Electronics│Keumseok Park, Samsung Electronics│Abir Shadman, IBM Research│Jaehong Lee, Samsung Electronics│WuKang Kim, IBM Research│Utkarsh Bajpai, IBM Research│Larry Zhuang, IBM Research│Shahrukh Khan, IBM Research│Wai Kin Li, IBM Research│Shogo Mochizuki, IBM Research│Takashi Ando, IBM Research│Shay Reboh, IBM Research│Debarghya Sarkar, IBM Research│Myung Yang, Samsung Electronics│Myunghoon Jung, Samsung Electronics│Tsung-Sheng Kang, IBM Research│Ilhom Saidjafar, IBM Research│Nate Putnam, IBM Research│Shanti Pancharatnam, IBM Research│Muthumanickam Sankarapandian, IBM Research│Erik Milosevic, IBM Research│Junmo Park, Samsung Electronics│Kishwar Mashooq, IBM Research│Prabudhya Chowdhury, IBM Research│Jim Mazza, IBM Research│Nick Lanzillo, IBM Research│Sarah Chowdhury, IBM Research│Yeojin Lee, Samsung Electronics│Paul Jamison, IBM Research│Matt Malley, IBM Research│Pinlei Chu, IBM Research│Jeonghyun Hwang, IBM Research│Mohsen Nasseri, IBM Research│Kibyung Park, Samsung Electronics│Namkyu Cho, Samsung Electronics│Jongmin Shin, Samsung Electronics│Inwon Park, IBM Research│Thanh Nguyen, IBM Research│Beomjin Park, Samsung Electronics│Feng Liu, IBM Research│Shivani Kumar, IBM Research│Cliff Osborn, IBM Research│Juntao Li, IBM Research│Lukas Tierney, IBM Research│James Demarest, IBM Research│Junli Wang, IBM Research│Eric Miller, IBM Research│Susan Fan, IBM Research│Jingyun Zhang, IBM Research│Yu Zhu, IBM Research│John Arnold, IBM Research│Tenko Yamashita, IBM Research│Dan Dechene, IBM Research│Kangill Seo, Samsung Electronics│Dechao Guo, IBM Research│Huiming Bu, IBM Research

Session 3 Focus Session | AI Memory: Technology and Architecture

1:30 PM Grand Ballroom B

Co-Chairs: Shimeng Yu, Geogia Tech and Wei-Chih Chien, Macronix

3-1: AiMX: Accelerator-in Memory Based Accelerator for Cost-effective Large Language Model Inference (Invited)

Haerang Choi, SK hynix│Guhyun Kim, SK hynix│Woojae Shin, SK hynix│Jongsoon Won, SK hynix│Changhyun Kim, SK hynix│Hyunha Joo, SK hynix│Byeongju An, SK hynix│Gyeongcheol Shin, SK hynix│Jeongbin Kim, SK hynix│Dayeon Yun, SK hynix│Jaehan Park, SK hynix│Yosub Song, SK hynix│Byeongsu Yang, SK hynix│Hyeongdeok Lee, SK hynix│Seungyeong Park, SK hynix│Wonjun Lee, SK hynix│Seonghun Kim, SK hynix│Yonghoon Park, SK hynix│Yousub Jung, SK hynix│Ilkon Kim, SK hynix│Gi-Ho Park, Sejong University│Euicheol Lim, SK hynix

3-2: Heterogeneous Embedded Neural Processing Units Utilizing PCM-based Analog In-Memory Computing

Irem Boybat, IBM Research - Zurich│Thomas Boesch, STMicroelectronics│Mario Allegra, STMicroelectronics│Matteo Baldo, STMicroelectronics│Jacopo Bertolini-Agnoletto, STMicroelectronics│Geoffrey W. Burr, IBM Research - Almaden│Alessandro Buschini, STMicroelectronics│Alessandro Cabrini, University of Pavia│Emanuela Calvetti, STMicroelectronics│Carmine Cappetta, STMicroelectronics│Francesco Conti, University of Bologna│Elena Ferro, IBM Research - Zurich│Eleonora Franchi Scarselli, University of Bologna│Angelo Garofalo, ETH Zurich│Francesca Girardi, STMicroelectronics│Gamze Islamoglu, ETH Zurich│Vara Prasad Jonnalagadda, IBM Research - Zurich│Geethan Karunaratne, IBM Research - Zurich│Corey Lammie, IBM Research - Zurich│Manuel Le Gallo, IBM Research - Zurich│Chen Li, King’s College London│Riccardo Massa, STMicroelectronics│Andrea Carlo Ornstein, STMicroelectronics│Hong Pang, ETH Zurich│Marco Pasotti, STMicroelectronics│Bipin Rajendran, King’s College London│Andrea Redaelli, STMicroelectronics│Irem Sanli, IBM Research - Zurich│Wililam Andrew Simon, IBM Research - Zurich│Abhairaj Singh, IBM Research - Zurich│Surinder-Pal Singh, STMicroelectronics│Giulio Urlini, STMicroelectronics│Athanasios Vasilopoulos, IBM Research - Zurich│Riccardo Zurla, STMicroelectronics│Giuseppe Desoli, STMicroelectronics│Abu Sebastian, IBM Research - Zurich

3-3: Prospects of Computing In or Near Flash Memories

Hang-Ting Lue, Macronix International Co., Ltd.│Chun-Hsiung Hung, Macronix International Co., Ltd.│Keh-Chung Wang, Macronix International Co., Ltd.│Chih-Yuan Lu, Macronix International Co., Ltd.

3-4: Memory-Centric Computing: Recent Advances in Processing-in-DRAM

Onur Mutlu, ETH Zurich│Ataberk Olgun, ETH Zurich│Geraldo Oliveira Jr., ETH Zurich│Ismail Yuksel, ETH Zurich

3-5: Future of Memory: Massive, Diverse, Tightly Integrated with Compute – from Device to Software

H.S. Philip Wong, Stanford│Shuhan Liu, Stanford University│Robert Radway, Stanford University│Xinxin Wang, Stanford University│Jimin Kwon, UNIST│Caroline Trippel, Stanford University│Phil Levis, Stanford University│Subhasish Mitra, Stanford University

3-6: Overcoming Memory Limitations for On-Device AI and LLM in Wearable AR Systems

Huichu Liu, Meta│Daniel Morris, Meta│Lita Yang, Meta│Ekin Sumbul, Meta│Tony Wu, Meta│Jaspreet Gandhi, Meta│Camillo Tamma, Meta│Umut Arslan, Meta│Baolin Yi, Meta│Rawan Naous, Meta│Paul Diefenbaugh, Meta│Edith Beigne, Meta

Session 4 Reliability Of Systems and Devices (RSD) | Memory and Ferroelectric Material Reliability

1:30 PM Continental 1-3

Co-Chairs: Kyoung Chul Jang, SK Hynix and Motoyuki Sato, Tokyo Electron Limited

4-1: Superior QLC Retention (10 years, 85°C) and Record Memory Window (12.2 V) by Gate Stack Engineering in Ferroelectric FET: from “MIFIS” to “MIKFIS”

Song-Hyeon Kuk, Korea Advanced Institute of Science and Technology│Bong Ho Kim, Korea Advanced Institute of Science and Technology│Youngkeun Park, Korea Advanced Institute of Science and Technology│Kyul Ko, Korea Institute of Science and Technology│Hyeon-Seong Hwang, Korea Advanced Institute of Science and Technology│Dahye Lee, Korea Advanced Institute of Science and Technology│Byung Jin Cho, Korea Advanced Institute of Science and Technology│Jae-Hoon Han, Korea Institute of Science and Technology│Sang-Hyeon Kim, Korea Advanced Institute of Science and Technology

4-2: Uniform and Fatigue-Free Ferroelectric HZO with Record EBD of 6.3MV/cm and Record Final 2Pr of 64µC/cm2 at Record 5E12 Endurance Using Low Lattice Misfit (2.9%) β-W

Guan-Hua Chen, Graduate Institute of Electronics Engineering, National Taiwan University│Yu-Tsung Liao, Graduate Institute of Electronics Engineering, National Taiwan University│Zefu Zhao, Graduate Institute of Electronics Engineering, National Taiwan University│Yu-Rui Chen, Graduate Institute of Electronics Engineering, National Taiwan University│Yun-Wen Chen, Graduate Institute of Electronics Engineering, National Taiwan University│Wei-Jen Chen, Graduate Institute of Electronics Engineering, National Taiwan University│Wei-Teng Hsu, Graduate Institute of Electronics Engineering, National Taiwan University│Hao-Yi Lu, Graduate School of Advanced Technology, National Taiwan University│Ming-Chang Liu, Graduate Institute of Electronics Engineering, National Taiwan University│Yu-An Chen, Graduate Institute of Electronics Engineering, National Taiwan University│C. W. Liu, Graduate Institute of Electronics Engineering, National Taiwan University

4-3: Self-Healing Ferroelectric Capacitors with ~1000x Endurance Improvement at High Temperatures (85–125˚C)

Nashrah Afroze, Student│Andrea Padovani, Professor│Jihoon Choi, Student│Priyankka Gundlapudi Ravikumar, Student│Yu-Hsin Kuo, Student│Chengyang Zhang, Student│Taeyoung Song, Student│Mengkun Tian, Research Scientist│Eknath Sarkar, Student│Manifa Noor, Student│Prasanna Venkatesan Ravindran, Student│Khandker Akif Aabrar, Student│Bilge Yildiz, Professor│Souvik Mahapatra, Professor│Andrew Kummel, Professor│Kyeongjae Cho, Professor│Shimeng Yu, Professor│Suman Datta, Professor│Jun Hee Lee, Professor│Luca Larcher, Scientist│Gaurav Thareja, Scientist│Asif Khan, Professor

4-4: Unveiling the Origin of Disturbance in FeFET and the Potential of Multifunctional TiO2 as a Breakthrough for Disturb-free 3D NAND Cell: Experimental and Modeling

Giuk Kim, KAIST│Hyunjun Kang, KAIST│Sangho Lee, KAIST│Hyojun Choi, KAIST│Yangjin Jung, KAIST│Mincheol Shin, KAIST│Kwangsoo Kim, Samsung Electronics│Suhwan Lim, Samsung Electronics│Jongho Woo, Samsung Electronics│Wanki Kim, Samsung Electronics│Daewon Ha, Samsung Electronics│Jinho Ahn, Hanyang University│Sanghun Jeon, KAIST

4-5: Highly Reliable and High-Yield 1.2V HfZrOx FRAM and its Physical Origin via Micrometer-Scale Nanocrystalline Domain Analysis

Yu-De Lin, Industrial Technology Research Institute│Chen-Yi Cho, National Yang Ming Chiao Tung University│Jian-Wei Su, Industrial Technology Research Institute│Yi-Hui Wei, Industrial Technology Research Institute│Li-Ying Hung, Industrial Technology Research Institute│Po-Han Chang, Industrial Technology Research Institute│Ching-Chih Hsu, Industrial Technology Research Institute│Po-Chun Yeh, Industrial Technology Research Institute│Min-Hung Lee, National Taiwan University│Tuo-Hung Hou, National Yang Ming Chiao Tung University│Shyh-Shyuan Sheu, Industrial Technology Research Institute│Wei-Chung Lo, Industrial Technology Research Institute│Shih-Chieh Chang, Industrial Technology Research Institute

4-6: Enhancing FeFET Performance through H2 Plasma Treatment: Improving Stability, Conductance, and Hamming Distances in FeCAM Designs

Ying-Tsan Tang, National Central University│ZiRong Huang, National Central University│Zheng Kai Chen, National Central University│Tzu Tsai Yu, National Central University│Chia Shuo Pai, National Central University│HaoMing Chen, National Central University│Sheng Tsang Huang, National Central University│Wei Ning Chang, Taiwan Semiconductor Research Institute│C.C Lin, Taiwan Semiconductor Research Institute

4-7: Unveiling memory-window narrowing mechanism after bipolar cycling in HZO/Si FeFETs: Critical role of hole trap generation and carrier de-trapping behavior

Seong-Kun Cho, The University of Tokyo│Kasidit Toprasertpong, The University of Tokyo│Mitsuru Takenaka, The University of Tokyo│Shinichi Takagi, The University of Tokyo

4-8: Polarization degradation and recovery strategies of hafnia-based ferroelectric capacitors after thermal budget in Back-End of Line process

Yunzhe Zheng, East China Normal University│Qiwendong Zhao, East China Normal University│Zhaomeng Gao, East China Normal University│Tianjiao Xin, East China Normal University│Yilin Xu, East China Normal University│Cheng Liu, East China Normal University│Yonghui Zheng, East China Normal University│Yan Cheng, East China Normal University

Session 5 Neuromorphic Computing (NC) | 3D Integration

1:30 PM Continental 4

Co-Chairs: Gina Adam, George Washington University and Seyoung Kim, POSTECH

5-1: High Dimensional Analog Range In-3D-NAND Search Accelerator for Applications of Search in Few-Shot Learning Model and Retrieval in Retrieval Augmented Generation

Po Hao Tseng, Macronix International Co., Ltd.│Shao Yu Fang, Macronix International Co., Ltd.│Chi-Tse Huang, National Taiwan University│Hao-Wei Chiang, National Taiwan University│Feng-Ming Lee, Macronix International Co., Ltd.│Yu-Hsuan Lin, Macronix International Co., Ltd.│Jhe-Yi Liao, Macronix International Co., Ltd.│Yu-Yu Lin, Macronix International Co., Ltd.│An-Yeu Wu, National Taiwan University│Hsiang-Yun Cheng, Academia Sinica│Ming-Hsiu Lee, Macronix International Co., Ltd.│Kuang-Yeu Hsieh, Macronix International Co., Ltd.│Keh-Chung Wang, Macronix International Co., Ltd.│Chih-Yuan Lu, Macronix International Co., Ltd.

5-2: High-density multilevel 3D vertical resistive switching memory (VRRAM) for massively parallel in-memory computing

Davide Bridarolli, Politecnico di Milano│Carlo Zucchelli, Politecnico di Milano│Piergiulio Mannocci, Politecnico di Milano│Saverio Ricci, Politecnico di Milano│Matteo Farronato, Politecnico di Milano│Giacomo Pedretti, Hewlett Packard Enterprise│Zhong Sun, Peking University│Daniele Ielmini, Politecnico di Milano

5-3: IGZO/TeOx Complementary Oxide Semiconductor based CFET for BEOL-compatible memory immersed logic

Ting Liu, Tsinghua University│Jianshi Tang, Tsinghua University│Yiwei Du, Tsinghua University│Huimin Yang, Tsinghua University│Yibei Zhang, Tsinghua University│Ziyi Liu, Tsinghua University│Zhixing Jiang, Tsinghua University│Ran An, Tsinghua University│Yue Xi, Tsinghua University│Yijun Li, Tsinghua University│Dong Wu, Tsinghua University│Bin Gao, Tsinghua University│He Qian, Tsinghua University│Huaqiang Wu, Tsinghua University

5-4: Demonstration of a Floating-point Deep Neural Matrix Equation Solver using 3D Vertical ReRAM with High Energy- and Area-Efficiency

Jiancong Li, huazhong university of science and technology│Shengguang Ren, huazhong university of science and technology│Yi Li, huazhong university of science and technology│Wenlong Peng, huazhong university of science and technology│Zhiwei Zhou, huazhong university of science and technology│Yibai Xue, huazhong university of science and technology│Yu Zhang, huazhong university of science and technology│Zhiwen Cao, huazhong university of science and technology│Jiayi Sun, huazhong university of science and technology│Yuhui He, huazhong university of science and technology│Xiangshui Miao, huazhong university of science and technology

5-5: Vertically Stackable Memcapacitor Crossbar Array based on NAND Flash Array Structure

Junsu Yu, Seoul National University│Hwiho Hwang, Hanyang University│Hyungjin Kim, Hanyang University│Woo Young Choi, Seoul National University

5-6: Monolithically 3D Integrated Memristive Bayesian Neural Network for Intelligent Motion Planning

Linbo Shan, Peking University│Lindong Wu, Peking University│Zongwei Wang, Peking University│Ruiqing Xie, Peking University│Chaoyi Ban, Peking University│Gaoqi Yang, Peking University│Qishen Wang, Peking University│Yuan Li, Beijing University of Technology│He Ma, Beijing University of Technology│Lin Bao, Peking University│Ling Liang, Peking University│Yuan Wang, Peking University│Yimao Cai, Peking University│Ru Huang, Peking University

5-7: Monolithic 3D Integration of Multi-layer CNT-CMOS/RRAM Macros for Mixed-Precision Analog-Digital Computing-in-Memory Architecture

YIBEI ZHANG, Tsinghua University│Jianshi Tang, Tsinghua Univercity│Yijun Li, Tsinghua Univercity│Lei Gao, Beijing Institute of Carbon-based Integrated Circuits│Ningfei Gao, Beijing Institute of Carbon-based Integrated Circuits│Haitao Xu, Beijing Institute of Carbon-based Integrated Circuits│Ran An, Tsinghua Univercity│Huimin Yang, Tsinghua Univercity│Zhengwu Liu, Tsinghua Univercity│Dong Wu, Tsinghua Univercity│Bin Gao, Tsinghua Univercity│He Qian, Tsinghua Univercity│Huaqiang Wu, Tsinghua Univercity

Session 6 Memory Technology (MT) | DRAM with Oxide Semiconductor Channel

1:30 PM Continental 5

Co-Chairs: Seiyon Kim, SK Hynix and Hongmei Wang, Micron

6-1: Oxide-semiconductor Channel Transistor DRAM (OCTRAM) with 4F2 Architecture

Shosuke Fujii, Kioxia Corporation│Tseng Fu Lu, Nanya Technology Corporation│Keiji Ikeda, Kioxia Corporation│Szu Yao Chang, Nanya Technology Corporation│Kei Sakamoto, Kioxia Corporation│Lu Wei Chung, Nanya Technology Corporation│Mutsumi Okajima, Kioxia Corporation│Jhen-Yu Tsai, Nanya Technology Corporation│Toshifumi Kuroda, Kioxia Corporation│Chung Peng Hao, Nanya Technology Corporation│Shinji Miyano, Kioxia Corporation│Mei Chuan Peng, Nanya Technology Corporation│Kimitoshi Okano, Kioxia Corporation│Martin Sillero, Nanya Technology Corporation│Akihiro Kajita, Kioxia Corporation│Chung Lin Huang, Nanya Technology Corporation│Takeshi Fujimaki, Kioxia Corporation│Chiang-Lin Shih, Nanya Technology Corporation

6-2: Vertical-channel Crystalline In2O3 FET with a Pulled-up Gate, Monolithically Stacked on Si CMOS, Achieving 112.2 µA/µm On-state Current

Shoki Miyata, Semiconductor Energy Laboratory Co., Ltd.│Kazuma Furutani, Semiconductor Energy Laboratory Co., Ltd.│Yusuke Komura, Semiconductor Energy Laboratory Co., Ltd.│Yoshinori Ando, Semiconductor Energy Laboratory Co., Ltd.│Satoru Saito, Semiconductor Energy Laboratory Co., Ltd.│Takeya Hirose, Semiconductor Energy Laboratory Co., Ltd.│Fumito Isaka, Semiconductor Energy Laboratory Co., Ltd.│Hidekazu Miyairi, Semiconductor Energy Laboratory Co., Ltd.│Hiroki Komagata, Semiconductor Energy Laboratory Co., Ltd.│Haruki Katagiri, Semiconductor Energy Laboratory Co., Ltd.│Takanori Matsuzaki, Semiconductor Energy Laboratory Co., Ltd.│Tatsuya Onuki, Semiconductor Energy Laboratory Co., Ltd.│Shunpei Yamazaki, Semiconductor Energy Laboratory Co., Ltd.

6-3: First Demonstration of 4-layer Stacked Planar Channel-All-Around (P-CAA) IGZO FETs with Cost-effective Process for High-density 1T1C 3D DRAM

Weiwei Li, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Xuezheng Ai, Beijing Superstring Academy of Memory Technology│Chen Gu, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Chuanke Chen, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Congyan Lu, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│xinlv Duan, Beijing Superstring Academy of Memory Technology│Jianqi Chen, Beijing Superstring Academy of Memory Technology│Xiangsheng Wang, Beijing Superstring Academy of Memory Technology│Kaiping Zhang, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Jin Dai, Beijing Superstring Academy of Memory Technology│Mingxu Liu, Beijing Superstring Academy of Memory Technology│Jiebin Niu, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Chuanhui Huang, Beijing Superstring Academy of Memory Technology│Jinjuan Xiang, Beijing Superstring Academy of Memory Technology│Yong Yu, Beijing Superstring Academy of Memory Technology│Feng Shao, Beijing Superstring Academy of Memory Technology│Guanhua Yang, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Yu Liu, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Xiaomeng Liu, Beijing Superstring Academy of Memory Technology│Shaohua Wang, Beijing Superstring Academy of Memory Technology│Bok-Moon Kang, Beijing Superstring Academy of Memory Technology│Gengfei Li, Beijing Superstring Academy of Memory Technology│Shenjie Zhao, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Nianduan Lu, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Di Geng, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Guilei Wang, Beijing Superstring Academy of Memory Technology│Chao Zhao, Beijing Superstring Academy of Memory Technology│Ling Li, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Ming Liu, State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences

6-4: First Demonstration on the Transient Writing Characteristics of Multi-bit ALD IGZO 2T0C DRAM by Fast I-V Measurement

Liankai Zheng, School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University│Ziheng Wang, School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University│Zhiyu Lin, School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University│Mengwei Si, School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University

6-5: Complementary Oxide Semiconductor-based 2T0C DRAM Macro with CFET peripherals using TeOx-PFET/IGZO-NFET for 3D Memory Integration

Yanbo Su, School of Integrated Circuits, Tsinghua University│Ting Liu, School of Integrated Circuits, Tsinghua University│Jianshi Tang, School of Integrated Circuits, Tsinghua University│Yijun Li, School of Integrated Circuits, Tsinghua University│Ran An, School of Integrated Circuits, Tsinghua University│Yiwei Du, School of Integrated Circuits, Tsinghua University│Zhidong Tang, School of Integrated Circuits, Tsinghua University│Yibei Zhang, School of Integrated Circuits, Tsinghua University│Yijia Fan, School of Integrated Circuits, Tsinghua University│Yuan He, School of Integrated Circuits, Tsinghua University│Mingcheng Shi, School of Integrated Circuits, Tsinghua University│Huimin Yang, School of Integrated Circuits, Tsinghua University│Tao Huang, School of Integrated Circuits, Tsinghua University│Jing Zhang, SAMT│Zhengyong Zhu, SAMT│Guilei Wang, SAMT│Chao Zhao, SAMT│Chen Wang, School of Materials Science and Engineering, Tsinghua University│Liyang Pan, School of Integrated Circuits, Tsinghua University│Peng Yao, School of Integrated Circuits, Tsinghua University│Dong Wu, School of Integrated Circuits, Tsinghua University│Bin Gao, School of Integrated Circuits, Tsinghua University│He Qian, School of Integrated Circuits, Tsinghua University│Huaqiang Wu, School of Integrated Circuits, Tsinghua University

6-6: First Demonstration of an N-P Oxide Semiconductor Complementary Gain Cell Memory

Fabia Farlin Athena, Stanford University│Elia Embrosi, Taiwan Semiconductor Manufacturing Company│Koustav Jana, Stanford University│Cheng-Hsien Wu, Taiwan Semiconductor Manufacturing Company│Jonathan Hartanto, Stanford University│Yuan-Mau Lee, Stanford University│C. C. Kuo, Taiwan Semiconductor Manufacturing Company│Shuhan Liu, Stanford University│Balreen Saini, Stanford University│C. C. Wang, Taiwan Semiconductor Manufacturing Company│Chen-Feng Hsu, Taiwan Semiconductor Manufacturing Company│Gilad Zeevi, Stanford University│Xinxin Wang, Stanford University│Jimin Kang, Stanford University│Eric Pop, Stanford University│T. Y. Lee, Taiwan Semiconductor Manufacturing Company│Paul C. McIntyre, Stanford University│H.-S. Philip Wong, Stanford University│Xinyu Y. Bao, Taiwan Semiconductor Manufacturing Company

6-7: Novel 4F2 Multi-bit Dual-gate 2T0C for High-density DRAM with Improved Vertical-channel IGZO TFTs by Self-aligned Single-step Process

Fuxi Liao, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China│Zhengyong Zhu, Bejing Superstring Academy of Memory Technology, Beijing 100176, China│Guanhua Yang, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China│Arokia Nathan, Darwin College, Cambridge University│Ling Li, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China│Ming Liu, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China

Session 7 Modeling and Simulation (MS) | Compact Modeling and DTCO

1:30 PM Continental 6

Co-Chairs: Jing Wang, NVIDIA and Lado Filipovic, TU Wien

7-1: Statistics Based Modeling and Analysis of Ultra-Low Impedance Carbon Nanotube MOS Capacitors

Matthias Passlack, TSMC│Nathaniel Safron, TSMC│Aaryan Oberoi, TSMC│Carlo Gilardi, TSMC│Jack Zuo, TSMC│Sheng-Kai Su, TSMC│Tzu-Ang Chao, TSMC│Amin Azizi, TSMC│Shreyam Natani, UCSD│Gilad Zeevi, Stanford University│Prabhakar Bandaru, UCSD│Andrew Kummel, UCSD│H.-S. Philip Wong, TSMC│Gregory Pitner, TSMC│Iuliana Radu, TSMC

7-2: Multiscale Thermal Impact of BSPDN: SoC Hotspot Challenges and Partial Mitigation

Bjorn Vermeersch, imec│Subrat Mishra, imec│Moritz Brunion, imec│Odysseas Zografos, imec│Melina Lofrano, imec│Herman Oprins, imec│James Myers, imec│Zsolt Tokei, imec│Geert Hellings, imec

7-3: Novel Logic & SRAM Interconnect Design for Advanced Complementary FET (CFET) based Technology Nodes

Ashish Pal, Applied Materials│Pratik Vyas, Applied Materials│Sefa Dag, Applied Materials│Gregory Costrini, Applied Materials│Benjamin Colombeau, Applied Materials│Bala Haran, Applied Materials│Subi Kengeri, Applied Materials│El Mehdi Bazizi, Applied Materials

7-4: Conflict-Free and Area-Efficient 4N4P CFET 8T SRAM with Double-Sided Signal Routing for Multibit Compute-in-Memory in AI Edge Devices

Yu-Cheng Lu, Graduate School of Advanced Technology, National Taiwan University, Taipei│Meng-Lin Wu, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei│Vita Pi-Ho Hu, Graduate School of Advanced Technology, National Taiwan University, Taipei

7-5: A Multi-WL Approach to Suppress Gate-Induced Drain Leakage, Floating Body Effect, and Row Hammer Effect in Array Transistor of 4F2 DRAM and 3D Stackable DRAM

Wei-Chen Chen, Macronix International Co., Ltd│Hang-Ting Lue, Macronix International Co., Ltd│Ming-Hung Wu, Macronix International Co., Ltd│Xi-Wei Lin, Synopsys│Ko-Hsin Lee, Synopsys│Po-Chou Chen, Synopsys│Salvatore Amoroso, Synopsys│Keh-Chung Wang, Macronix International Co., Ltd│Chih-Yuan Lu, Macronix International Co., Ltd

7-6: A Production Line Level MTJ Modeling Framework: Integrating Physical Mechanisms, Experimental Data and Manufacturing Variation

Zhizhong Zhang, Beihang University│Kelian Lin, Beihang University│Kaihua Cao, Beihang University│Jinkai Wang, Beihang University│Jia Yang, Beihang University│Bojun Zhang, Beihang University│Hongchao Zhang, Truth Memory Corporation│Hongxi Liu, Truth Memory Corporation│Gefei Wang, Truth Memory Corporation│Weisheng Zhao, Beihang University│Yue Zhang, Beihang University

7-7: An Experimentally Validated TCAD Variability Study of The Relative Performance of In-Ga-Zn-O (IGZO) And Poly-Si-Channel Ferroelectric VNANDs

Mischa Thesberg, Global TCAD Solutions GmbH│Zlatan Stanojevic, Global TCAD Solutions GmbH│Franz Schanovsky, Global TCAD Solutions GmbH│Jose-Maria Gonazalez-Medina, Global TCAD Solutions GmbH│Gerhard Rzepa, Global TCAD Solutions GmbH│Ferdinand Mitterbauer, Global TCAD Solutions GmbH│Oskar Baumgartner, Global TCAD Solutions GmbH│Markus Karner, Global TCAD Solutions GmbH

7-8: First large-scale (68×25×5 nm3) atomistic modeling for accurate and efficient etching process based on machine learning molecular dynamics (MLMD)

Zemeng Feng, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Ziyi Hu, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Tong Yu, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Panpan Lai, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Rui Ge, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Hua Shao, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Dashan Shang, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Zhiqiang Li, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Kui Xu, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Junjie Li, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Rui Chen, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China│Ling Li, State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China

Session 8 Optoelectronics, Displays, and Imaging Systems (ODI) | Advanced Optoelectronic Devices

1:30 PM Continental 7-9

Co-Chairs: Jamie Phillips, University of Delaware and Susanna Thon, Johns Hopkins University

8-1: A 58×60 ϖ/2-Resolved Integrated Phase Modulator And Sensor With Intra-Pixel Processing

Arnaud Verdant, CEA Leti│Pierre Joly, CEA Leti│Benoît Racine, CEA Leti│Olivier Haon, CEA Leti│Sébastien Martin, CEA Leti│Guillaume Moritz, CEA Leti

8-2: A 2.1-ns Dead Time 5-µm Single Photon Avalanche Diode with 2-layer Transistor Pixel Technology

Jun Ogi, Sony Semiconductor Solutions Corporation│Shota Kitamura, Sony Semiconductor Solutions Corporation│Fumitaka Sugaya, Sony Semiconductor Solutions Corporation│Junki Suzuki, Sony Semiconductor Solutions Corporation│Aoi Magori, Sony Semiconductor Solutions Corporation│Tomonori Matsui, Sony Semiconductor Solutions Corporation│Kei Sumita, Sony Semiconductor Solutions Corporation│Yuki Ushiku, Sony Semiconductor Solutions Corporation│Koji Moriyama, Sony Semiconductor Manufacturing Corporation│Kenji Toshima, Sony Semiconductor Manufacturing Corporation│Tomohiro Namise, Sony Semiconductor Solutions Corporation│Hideki Ozawa, Sony Semiconductor Solutions Corporation│Yasunori Tsukuda, Sony Semiconductor Solutions Corporation│Yusuke Otake, Sony Semiconductor Solutions Corporation│Hiroki Hiyama, Sony Semiconductor Solutions Corporation│Shizunori Matsumoto, Sony Semiconductor Solutions Corporation│Atsushi Suzuki, Sony Semiconductor Solutions Corporation│Fumihiko Koga, Sony Semiconductor Solutions Corporation

8-3: Highly-Sensitive Free-Standing Waveguide-Integrated Bolometer on Germanium-on-Insulator Platform for Mid-Infrared on-Chip Spectroscopy

Inki Kim, KAIST│Joonsup Shim, KAIST│Jinha Lim, KAIST│Jaeyong Jeong, KAIST│Bong Ho Kim, KAIST│SangHyeon Kim, KAIST

8-4: Ultra-Low Temperature Characterization of Fully-Integrated III-V Photodetectors for Quantum Networks

Simone Iadanza, Paul Scherrer Institute│Myriam Rihani, IBM Research│Cristina Martinez-Oliver, IBM Research│Markus Scherrer, Paul Scherrer Institute│Heinz Schmid, IBM Research│Vihar Georgiev, University of Glasgow│Kirsten Moselund, Paul Scherrer Institute

8-5: Quantum-confined-traps-assisted Carrier-multiplication-enabled Photodetector and Arrays for Smart Visualization and High-quality Imaging

Dongyang Luo, School of Microelectronics, University of Science and Technology of China│Yong Yan, School of Microelectronics, University of Science and Technology of China│Xin Liu, School of Microelectronics, University of Science and Technology of China│Huabin Yu, School of Microelectronics, University of Science and Technology of China│Yang Kang, School of Microelectronics, University of Science and Technology of China│Yuanmin Luo, School of Microelectronics, University of Science and Technology of China│Wei Chen, School of Microelectronics, University of Science and Technology of China│Zhixiang Gao, School of Microelectronics, University of Science and Technology of China│Haiding Sun, School of Microelectronics, University of Science and Technology of China

8-6: Parallel In-memory Dot Product Engine Using Non-volatile Ferroelectric Microring Resonator Weight Bank For High-throughput Parallel Photonic Convolutional Accelerator

YUE CHEN, National University of Singapore│Rui Shao, National University of Singapore│Gong Zhang, National University of Singapore│Leming Jiao, National University of Singapore│Xuanqi Chen, National University of Singapore│Kaizhen Han, National University of Singapore│Zijie Zheng, National University of Singapore│Zuopu Zhou, National University of Singapore│Chen Sun, National University of Singapore│Jishen Zhang, National University of Singapore│Qiwen Kong, National University of Singapore│Xiao Gong, National University of Singapore

Session 9 Power, Microwave/Mm-Wave and Analog Devices/Systems (PMA) | High Performance III-V and WBG RF FETs

1:30 PM Imperial A

Co-Chairs: Colombo BOLOGNESI, ETH Zurich and Vibhor JAIN, Globalfoundries

9-1: Hetero-Integration of InP Chiplets on a 300 mm RF Silicon Interposer for mm-wave Applications

SIDDHARTHA SINHA, IMEC│HAMIDEH JAFARPOORCHEKAB, IMEC│NELSON PINHO, IMEC│DAMIEN LEECH, IMEC│KOEN KENNES, IMEC│FRANCOIS CHANCEREL, IMEC│ANGEL URUENA, IMEC│EHSAN SHAFAHIAN, IMEC│MELINA LOFRANO, IMEC│ANDY MILLER, IMEC│ERIC BEYNE, IMEC│NADINE COLLAERT, IMEC│XIAO SUN, IMEC

9-2: III-V MOSFETs for RF Applications

Erik Lind, Lund University│Navya Garigapati, Lund University

9-3: 30nm Channel-Length Enhancement-Mode GaN MOSHEMT Transistors on a 300mm GaN-on-TRSOI Engineered Substrate

Han Wui Then, Intel Corporation│Pratik Koirala, Intel Corporation│Leo Varghese, Intel Corporation│Ahmad Zubair, Intel Corporation│Samuel Bader, Intel Corporation│Michael Beumer, Intel Corporation│Heli Vora, Intel Corporation│Prafful Golani, Intel Corporation│Jason Peck, Intel Corporation│Thomas Hoff, Intel Corporation│Curtis Hoffman, Intel Corporation│Wesley Harrison, Intel Corporation│Marko Radosavljevic, Intel Corporation

9-4: CMOS compatible 200 mm GaN-on-Si HEMTs for RF switch applications with 36 dBm CW power handling and 200 fs RonCoff

Luca Lucci, CEA Leti│Ismael Charlet, CEA Leti│Yveline Gobil, CEA Leti│Fanny Morisot, CEA Leti│Julien Delprato, CEA Leti│Simon Ruel, CEA Leti│Khatia Benotmane, CEA Leti│Fabien Laulagnet, CEA Leti│Romain Bon, CEA Leti│pattamon Dezest, CEA Leti│Arnaud Anotta, CEA Leti│Thierry Billon, CEA Leti│Blandine Duriez, CEA Leti│Erwan Morvan, CEA Leti

9-5: Strain-balanced AlScN/GaN HEMTs with fT/fMAX of 173/321 GHz

Thai Son Nguyen, Cornell University│Kazuki Nomoto, Cornell University│Wenwen Zhao, Cornell University│Chandrashekhar Savant, Cornell University│Huili (Grace) Xing, Cornell University│Debdeep Jena, Cornell University

9-6: First Demonstration of Wafer-level Arrayed β-Ga2O3 Thin Films and MOSFETs on Diamond by Transfer Printing Technology

Tiancheng Zhao, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China│Xinxin Yu, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute, Nanjing 210016, China│Wenhui Xu, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China│Yang He, School of Science and Ministry of Industry and Information Technology Key Laboratory of Micro-Nano Optoelectronic Information System, Harbin Institute of Technology, Shenzhen 518055, China│Zhenyu Qu, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China│Rui Shen, National Key Laboratory of Solid-State Microwave Devices and Circuits, Nanjing 210016, China│Ruize Wang, National Key Laboratory of Solid-State Microwave Devices and Circuits, Nanjing 210016, China│Huaixin Guo, National Key Laboratory of Solid-State Microwave Devices and Circuits, Nanjing 210016, China│Huarui Sun, School of Science and Ministry of Industry and Information Technology Key Laboratory of Micro-Nano Optoelectronic Information System, Harbin Institute of Technology, Shenzhen 518055, China│Zhonghui Li, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute, Nanjing 210016, China│Min Zhou, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China│Tiangui You, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China│Xin Ou, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China

9-7: High-k/Diamond RF MOSFETs with Record High fT/fmax of 90/164 GHz and First Demonstration of a Diamond MMIC

Xinxin Yu, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute│Bin Qiao, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute│Yan Sun, National Key Laboratory of Solid-State Microwave Devices and Circuits│Ran Tao, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute│Ruize Wang, National Key Laboratory of Solid-State Microwave Devices and Circuits│Jianjun Zhou, National Key Laboratory of Solid-State Microwave Devices and Circuits│Huaixin Guo, National Key Laboratory of Solid-State Microwave Devices and Circuits│Zhonghui Li, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute│Haiyan Lu, National Key Laboratory of Solid-State Microwave Devices and Circuits│Hehe Gong, School of Electronic Science and Engineering, Nanjing University│Zhengyi Cao, CETC Key Laboratory of Carbon-based Electronics, Nanjing Electronic Devices Institute│Yuhao Zhang, Virginia Tech│Jiandong Ye, School of Electronic Science and Engineering, Nanjing University│Yuechan Kong, National Key Laboratory of Solid-State Microwave Devices and Circuits│Tangsheng Chen, National Key Laboratory of Solid-State Microwave Devices and Circuits

Session 10 Emerging Device and Compute Technology (EDT) | Novel Platforms for Computing

1:30 PM Imperial B

Co-Chairs: MAUD VINET, Quobly and David Michalak, TNO

10-1: High-Performance Aligned Carbon Nanotube FETs with Record Transconductance of 3.7 mS/µm

yifan liu, Peking university│Zipeng Pan, Peking university│Sujuan Ding, Zhejiang Univerity│Weili Li, University of Electronic Science and Technology of China│yanning zhang, University of Electronic Science and Technology of China│yumeng ze, Peking university│chuanhong Jin, Zhejiang Univerity│Li Ding, Peking university│Lian-Mao Peng, Peking university│Zhiyong Zhang, Peking university

10-2: Iso-performance N-type and P-type MOSFETs on densely aligned CNT array enabled by self-aligned extension doping with barrier booster

Shengman Li, Stanford University│Donglai Zhong, Taiwan Semiconductor Manufacturing Company Limited, San Jose, USA│Carlo Gilardi, Taiwan Semiconductor Manufacturing Company Limited, San Jose, USA│Nathaniel Safron, Taiwan Semiconductor Manufacturing Company Limited, San Jose, USA│Tzu-Ang Chao, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Gilad Zeevi, Stanford University│Samantha Rijs, Stanford University│Andrew Bechdolt, Stanford University│Matthias Passlack, Taiwan Semiconductor Manufacturing Company Limited, San Jose, USA│Gregory Pitner, Taiwan Semiconductor Manufacturing Company Limited, San Jose, USA│Iuliana Radu, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│H.-S. Philip Wong, Stanford University│Subhasish Mitra, Stanford University

10-3: Diamond 3D Thermal Scaffolding for Ultra-Dense 3D Integrated Circuits

Junrui Lyu, Stanford University│Mohamadali Malakoutian, Stanford University│Dennis Rich, Stanford University│Anna Kasperovich, Stanford University│Rohith Soman, Stanford University│Janelle Mabrey, Stanford University│Jeongkyu Kim, Stanford University│Kelly Woo, Stanford University│Zhengliang Bian, Stanford University│Subhasish Mitra, Stanford University│Srabanti Chowdhury, Stanford University

10-4: Integration of Co Nanomagnets for Localized EDSR in Scalable FDSOI Spin Qubit Architectures

Fabio Bersano, EPFL│Michele Aldeghi, IBM│Niccolò Martinolli, EPFL│Victor Boureau, EPFL│Rolf Allenspach, IBM│Gian Salis, IBM│Adrian Ionescu, EPFL

10-5: Origin of Long-period Electrical Instability in Silicon Fin-type Quantum Dots

Hiroshi Oka, National Institute of Advanced Industrial Science and Technology (AIST)│Hidehiro Asai, National Institute of Advanced Industrial Science and Technology (AIST)│Kimihiko Kato, National Institute of Advanced Industrial Science and Technology (AIST)│Takumi Inaba, National Institute of Advanced Industrial Science and Technology (AIST)│Shunsuke Shitakata, National Institute of Advanced Industrial Science and Technology (AIST)│Shota Iizuka, National Institute of Advanced Industrial Science and Technology (AIST)│Yusuke Chiashi, National Institute of Advanced Industrial Science and Technology (AIST)│Yuika Kobayashi, National Institute of Advanced Industrial Science and Technology (AIST)│Hitoshi Yui, National Institute of Advanced Industrial Science and Technology (AIST)│Shoko Nagano, National Institute of Advanced Industrial Science and Technology (AIST)│Shigenori Murakami, National Institute of Advanced Industrial Science and Technology (AIST)│Yoshihisa Iba, National Institute of Advanced Industrial Science and Technology (AIST)│Minoru Ogura, National Institute of Advanced Industrial Science and Technology (AIST)│Takashi Nakayama, National Institute of Advanced Industrial Science and Technology (AIST)│Hanpei Koike, National Institute of Advanced Industrial Science and Technology (AIST)│Hiroshi Fuketa, National Institute of Advanced Industrial Science and Technology (AIST)│Satoshi Moriyama, Tokyo Denki University (TDU)│Takahiro Mori, National Institute of Advanced Industrial Science and Technology (AIST)

10-6: FDSOI platform for quantum computing

Bruna Paz, Quobly│Giselle Elbaz, Quobly│Mathilde Ouvrier-Buffet, CNRS│Mikaël Cassé, CEA-Leti│Flavio Bergamaschi, CEA-Leti│Jean-Baptiste Filippini, CNRS│Javier Suarez Berru, CNRS│Pierre-Louis Julliard, Quobly│Biel Martinez I Diaz, CEA-Leti│Bernhard Klemt, CNRS│Victor El-Homsy, CNRS│Victor Champain, CEA-IRIG│Victor Millory, CEA-IRIG│Renan Lethiecq, Quobly│Valentin Labracherie, CEA-Leti│Gregoire Roussely, CEA-Leti│Benoit Bertrand, CEA-Leti│Heimanu Niebojewski, CEA-Leti│Franck Badets, CEA-Leti│Matias Urdampilleta, CNRS│Silvano De Franceschi, CEA-IRIG│Tristan Meunier, Quobly│Maud Vinet, Quobly

Session 11 Memory Technology (MT) | Embedded Memories

9:00 AM Grand Ballroom A

Co-Chairs: Zhiqiang Wei, Avalanche Technology and Johannes Mueller, GlobalFoundries

11-1: Best-In-Class density Single-Ended ePCM memory array for weight storage in edge-AI applications

Andrea Redaelli, STMicroelectronics, TR&D│Anna Gandolfo, STMicroelectronics, TR&D│Paolo Mattavelli, STMicroelectronics, TR&D│Fabio Bonfiglio, STMicroelectronics, TR&D│Jeremie Jasse, STMicroelectronics, TR&D│Luca Scotti, STMicroelectronics, TR&D│Giulia Samanni, STMicroelectronics, TR&D│Antonino Conte, STMicroelectronics, MDRF│Franck Arnaud, STMicroelectronics, TR&D│Christian Bocaccio, STMicroelectronics, TR&D│Giuseppe Desoli, STMicroelectronics, SRA│Roberto Annunziata, STMicroelectronics, TR&D

11-2: Hf0.5Zr0.5O2 FeRAM scalability demonstration at 22nm FDSOI node for embedded applications

Simon MARTIN, CEA-Leti│Carine JAHAN, CEA-Leti│Liam HOSIER, CEA-Leti│Fabien GRIMAUD, CEA-Leti│Mélanie LOURO, CEA-Leti│Julie LAGUERRE, CEA-Leti│Jean COIGNUS, CEA-Leti│William VANDENDAELE, CEA-Leti│Julien BORREL, CEA-Leti│Niccolo CASTELLANI, CEA-Leti│Valentina MELI, CEA-Leti│Jean ROTTNER, CEA-Leti│Christelle BOIXADERAS, CEA-Leti│Thomas MAGIS, CEA-Leti│Antonio ROMAN, CEA-Leti│Messaoud BEDJAOUI, CEA-Leti│Julien MERCIER, CEA-Leti│Stéphane MINORET, CEA-Leti│Catherine EUVRARD, CEA-Leti│Julian STURM, CEA-Leti│Sébastien KERDILES, CEA-Leti│Mathieu OPPRECHT, CEA-Leti│Corinne COMBOROURE, CEA-Leti│Aurélie SOUHAITE, CEA-Leti│Karine JULLIAN, CEA-Leti│Jorge Pablo NACENTA MENDIVIL, CEA-Leti│Tommaso GIAMMARIA, CEA-Leti│Ludovic COUTURE, CEA-Leti│Olivier GLORIEUX, CEA-Leti│Karim AZIZI-MOURIER, CEA-Leti│Thierry BILLON, CEA-Leti│Sophie DUMONT, CEA-Leti│Olivier GUILLER, CEA-Leti│Mehdi MOUHDACH, CEA-Leti│Adrien BLOT-SABY, CEA-Leti│Denys LY, CEA-Leti│Sébastien MARTINIE, CEA-Leti│Christelle CHARPIN-NICOLLE, CEA-Leti│François ANDRIEU, CEA-Leti│Olivier BILLOINT, CEA-Leti│Laurent GRENOUILLET, CEA-Leti

11-3: World-most energy-efficient 14nm automotive eMRAM technology for high-endurance applications

Tae Young Lee, Samsung Electronics│Jong Min Lee, Samsung Electronics│Young Wan Oh, Samsung Electronics│Hong-Hyun Kim, Samsung Electronics│Bae Seong Kwon, Samsung Electronics│Kazutaka Yamane, Samsung Electronics│Min Kwan Kim, Samsung Electronics│Pyung Hwa Jang, Samsung Electronics│Dong Kyu Lee, Samsung Electronics│Ho Jin Gwak, Samsung Electronics│Byung Kweon Jang, Samsung Electronics│Hyung Keun Gweon, Samsung Electronics│Ju Sung Oh, Samsung Electronics│Gwang Seok Yang, Samsung Electronics│Jae Hyeon Park, Samsung Electronics│Gi Woong Kwon, Samsung Electronics│Ju Hyun Kim, Samsung Electronics│Young Hyun Kim, Samsung Electronics│Jeong-Heon Park, Samsung Electronics│Jaechul Shim, Samsung Electronics│Jun Ho Park, Samsung Electronics│Woochang Lim, Samsung Electronics│Seungpil Ko Ko, Samsung Electronics│Hyun Jin Shin, Samsung Electronics│Yong Sung Ji, Samsung Electronics│So Hee Hwang, Samsung Electronics│Min Kwon Cho, Samsung Electronics│Kyung Tae Nam, Samsung Electronics│Bo Young Seo, Samsung Electronics│Kiseok Suh, Samsung Electronics│Shin Hee Han, Samsung Electronics│Yoon Jong Song, Samsung Electronics│Kangho Lee, Samsung Electronics│Ja-Hum Ku, Samsung Electronics

11-4: Key Technologies of Scaling Embedded MRAM to 8nm Logic and Beyond for Automotive Application

Seungpil Ko, Samsung Electronics│JaeChul Shim, Samsung Electronics│JunHo Park, Samsung Electronics│Woochang Lim, Samsung Electronics│HYUNSUNG JUNG, Samsung Electronics│JUNGHOON BAK, Samsung Electronics│DAEEUN JEONG, Samsung Electronics│JAEWOOK Lee, Samsung Electronics│Hyunseok Whang, Samsung Electronics│Manjin Eom, Samsung Electronics│Dongwoo Shin, Samsung Electronics│JongHyuk Lee, Samsung Electronics│Seongcheol Noh, Samsung Electronics│Jaehak Yang, Samsung Electronics│Jeong-Heon Park, Samsung Electronics│YOUNGHYUN KIM, Samsung Electronics│Cheol Kim, Samsung Electronics│JUHYUN KIM, Samsung Electronics│TaeYoung Lee, Samsung Electronics│SHINHEE HAN, Samsung Electronics│Sohee Hwang, Samsung Electronics│Kangho Lee, Samsung Electronics│Sangjin Hyun, Samsung Electronics│Yoonjong Song, Samsung Electronics│SUJIN AHN, Samsung Electronics│Jaihyuk Song, Samsung Electronics

11-5: Demonstration of 128 Kb SOT-MRAM chip with 5 ns write and 15 ns read speed, high endurance over 10¹⁰ and low ECC-on bit error rate

Chuanpeng Jiang, Beihang University│Shiyang Lu, Beihang University│Zhongkui Zhang, Beihang University│Xiaofei Fan, Truth Memory Corporation│Danrong Xiong, Truth Memory Corporation│Jinhao Li, Beihang University│Hongxi Liu, Truth Memory Corporation│Gefei Wang, Truth Memory Corporation│He Zhang, Beihang University│Hui Jin, Beihang University│Kaihua Cao, Beihang University│Deming Zhang, Beihang University│Zhaohao Wang, Beihang University│Weisheng Zhao, Beihang University

11-6: A 28nm 4Mb Embedded RRAM IP with Record-High Endurance of 107 Cycles and 10years@125°C Retention through Reliability-Enhanced Design-Technology Co-Optimization

Junyang Zhang, School of Integrated Circuits, Tsinghua University, Beijing, China│Xiangchao Ma, Beijing InnoMem Technologies Co., Ltd, China│Yue Xi, School of Integrated Circuits, Tsinghua University, Beijing, China│Yuyao Lu, School of Integrated Circuits, Tsinghua University, Beijing, China│Kun Wang, Beijing InnoMem Technologies Co., Ltd, China│Hanyu Ren, Beijing InnoMem Technologies Co., Ltd, China│Jianshi Tang, School of Integrated Circuits, Tsinghua University, Beijing, China│Liyang Pan, School of Integrated Circuits, Tsinghua University, Beijing, China│Lei Chen, Beijing Microelectronics Technology Institute, China│Dong Wu, School of Integrated Circuits, Tsinghua University, Beijing, China│Bin Gao, School of Integrated Circuits, Tsinghua University, Beijing, China│He Qian, School of Integrated Circuits, Tsinghua University, Beijing, China│Huaqiang Wu, School of Integrated Circuits, Tsinghua University, Beijing, China

Session 12 Advanced Logic Technology (ALT) | Alternative Channel Material Devices

9:00 AM Grand Ballroom B

Co-Chairs: Paul Grudowski, NXP and Daphnée Bosch, CEA-Leti

12-1: First Demonstration of W-doped In2O3 Gate-All-Around (GAA) Nanosheet FET with Improved Performance and Record Threshold Voltage Stability

Eknath Sarkar, Georgia Institute Of Technology│Chengyang Zhang, Georgia Institute Of Technology│Dyutimoy Chakraborty, Georgia Institute Of Technology│Faaiq G Waqar, Georgia Institute Of Technology│Sharadindugopal Kirtania, Georgia Institute Of Technology│Khandker Akif Aabrar, Georgia Institute Of Technology│Hyeonwoo Park, Georgia Institute Of Technology│Jaewon Shin, Georgia Institute Of Technology│Mengkun Tian, Georgia Institute Of Technology│Asif I Khan, Georgia Institute Of Technology│Shimeng Yu, Georgia Institute Of Technology│Suman Datta, Georgia Institute Of Technology

12-2: First Demonstration of BEOL Wafer-Scale All-ALD Channel CFETs Using IGZO and Te for Monolithic 3D Integration

Chang Niu, Purdue University│Pukun Tan, Purdue University│Jian-Yu Lin, Purdue University│Linjia Long, Purdue University│Zehao Lin, Purdue University│Yizhi Zhang, Purdue University│Haiyan Wang, Purdue University│Glen Wilk, ASM│Peide Ye, Purdue University

12-3: High-performance Vertical Gate-All-Around Oxide Semiconductor Transistors with 6 nm ALD IGZO Channel and Scaled Contact CD down to 28 nm

Kishou Kaneko, Huawei Technologies Japan K.K., Japan│Wanpeng Zhao, Huawei Technologies Co., LTD., China│Wei Cui, Huawei Technologies Co., LTD., China│Lu Kang, Huawei Technologies Co., LTD., China│Shiheng Lu, Huawei Technologies Co., LTD., China│Wenqiang Yuan, Huawei Technologies Co., LTD., China│Heng Wang, Huawei Technologies Co., LTD., China│Shijie Zhan, Huawei Technologies Co., LTD., China│Yuqi Wang, Huawei Technologies Co., LTD., China│Yibiao Yin, Huawei Technologies Co., LTD., China│Lijuan Xing, Huawei Technologies Co., LTD., China│Xia Sang, Huawei Technologies Co., LTD., China│Yuan Shao, Huawei Technologies Co., LTD., China│Zebin Lin, Huawei Technologies Co., LTD., China│Hongguang Shen, Huawei Technologies Co., LTD., China│Xiaojuan Cui, Huawei Technologies Co., LTD., China│Ying Wu, Huawei Technologies Co., LTD., China│Jeffrey Xu, Huawei Technologies Co., LTD., China

**12-4: High-performance Monolayer-2D Stacked Nanosheet FETs with high ION ~ 451 µA/µm and ION/IOFF **
en Xi, imec│Himanshu Sharma, imec│Xiangyu Wu, imec│Devin Verreck, imec│Daire Cott, imec│Robert Grubbs, imec│Tien Ngo, imec│Pawan Kumar, imec│Pierre Morin, imec│Benjamin Groven, imec│Jean-Francois Marneffe, imec│Dennis Dorp, imec│Souvik Ghosh, imec│Zaoyang Lin, imec│Ankit Mehta, imec│Zhuo Chen, imec│Surajit Sutar, imec│Tom Schram, imec│Quentin Smets, imec│Dennis Lin, imec│Kaustuv Banerjee, imec│Cesar Rosa, imec│Ludovic Goux, imec│Gouri Kar, imec

12-5: Stacked Channel Transistors with 2D Materials: an Integration Perspective

Yun-Yan Chung, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Bo-Jhih Chou, Institute of Electronics National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Wei-Sheng Yun, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Chen-Feng Hsu, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Shao-Ming Yu, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Yu-I Chang, Institute of Electronics National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Chen-Yi Lee, Institute of Electronics National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Sui-An Chou, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Po-Hsun Ho, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Aslan Wei, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│D. Mahaveer Sathaiya, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Bo-Heng Liu, Taiwan Instrument Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan│Chien-Wei Chen, Taiwan Instrument Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan│Chien-Ying Su, Taiwan Instrument Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan│Chi-Chung Kei, Taiwan Instrument Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan│Fu-Kuo Hsueh, Taiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan.│Tuo-Hung Hou, Taiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan.│Wen-Hao Chang, Department of Electrophysics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Jin Cai, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Chung-Cheng Wu, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Jeff Wu, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Wei-Yen Woon, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Tung-Ying Lee, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Chao-Hsin Chien, Institute of Electronics National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Chao-Ching Cheng, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan│Iuliana Radu, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan

12-6: Quantum Confinement Controlled Positive to Negative Schottky Barrier Conversion in Ultrathin In2O3 Transistor Contacts

Jian-Yu Lin, Purdue University│Chang Niu, Purdue University│Zehao Lin, Purdue University│Taehyun Kim, Ulsan National Institute of Science and Technology│Beomjin Park, Ulsan National Institute of Science and Technology│Hyeongjun Jang, Ulsan National Institute of Science and Technology│Changwook Jeong, Ulsan National Institute of Science and Technology│Peide D. Ye, Purdue University

12-7: First Demonstration of BEOL-Compatible NV-SRAM Featuring Vertically Stacked ITO FETs and HfO2-based Ferroelectric Capacitors for High Density Monolithic 3D Integration

Zuopu Zhou, National University of Singapore│Jiawei Xie, National University of Singapore│Leming Jiao, National University of Singapore│Kaizhen Han, National University of Singapore│Yuye Kang, National University of Singapore│Zijie Zheng, National University of Singapore│Qiwen Kong, National University of Singapore│Xiaolin Wang, National University of Singapore│Bich-Yen Nguyen, Soitec│Xiao Gong, National University of Singapore

Session 13 Neuromorphic Computing (NC) | Emerging Compute-In-Memory Hardware

9:00 AM Continental 1-3

Co-Chairs: Giuseppe Desoli, STMicroelectronics and Hidehiro Fujiwara, TSMC

13-1: Graphlet Decomposition using Random-Walk Memristors

Kyung Seok Woo, Sandia National Laboratories│Nestor Ghenzi, Seoul National University│A. Alec Talin, Sandia National Laboratories│Hyungjun Park, Seoul National University│Sangheon Oh, Sandia National Laboratories│Cheol Seong Hwang, Seoul National University│R. Stanley Williams, Sandia National Laboratories│Suhas Kumar, Sandia National Laboratories

13-2: Neural Manifold Learning Based on 40nm Dual-Mode PCM Compute-in-Memory Chip with Hardware Adaptive Drift Compensation

Yuqi Li, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Longhao Yan, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Xi Li, State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Zeyu Wang, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Zelun Pan, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Xile Wang, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Bowen Wang, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Zhe Zhan, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Xiyuan Tang, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Yaoyu Tao, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Woo-Ping Ge, Center for Brain Inspired Intelligence, Chinese Institute for Brain Research (CIBR)│Zhitang Song, State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Ru Huang, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University│Yuchao Yang, Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Peking University

13-3: Conditional Diffusion Model Acceleration with First-Demonstrated RRAM-based In-memory Neural Differential Equation Solver

Jichang Yang, The University of Hong Kong│Hegan Chen, The University of Hong Kong│Jia Chen, AI Chip Center for Emerging Smart Systems│Songqi Wang, The University of Hong Kong│Shaocong Wang, The University of Hong Kong│Yifei Yu, The University of Hong Kong│Bo Wang, The University of Hong Kong│Ning Lin, The University of Hong Kong│Xinyuan Zhang, The University of Hong Kong│Rui Chen, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Zhongrui Wang, The University of Hong Kong│Dashan Shang, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences│Han Wang, The University of Hong Kong│Qi Liu, Fudan University│Ming Liu, Fudan University

13-5: Forward-Forward Learning Exploiting Low-Voltage Reset of RRAM

Bastien Imbert, Aix-Marseille Univ., CNRS│Adrien Renaudineau, Univ. Paris-Saclay, CNRS│Mamadou Hawa Diallo, Aix-Marseille Univ., CNRS│Jorge-Daniel Aguirre-Morales, Aix-Marseille Univ., CNRS│Mohammed Akib Iftakher, Univ. Paris-Saclay, CNRS│Kamel-Eddine Harabi, Univ. Paris-Saclay, CNRS│Clément Turck, Univ. Paris-Saclay, CNRS│Marie Drouhin, Univ. Paris-Saclay, CNRS│Tifenn Hirtzlin, CEA-Leti│Elisa Vianello, CEA-Leti│Jean-Michel Portal, Aix-Marseille Univ., CNRS│Marc Bocquet, Aix-Marseille Univ., CNRS│Damien Querlioz, Univ. Paris-Saclay, CNRS

13-6: Filament-free Bulk RRAM with High Endurance and Long Retention for Neuromorphic Few-Shot Learning On-Chip

Ashwani Kumar, UC San Diego│Yucheng Zhou, UC San Diego│Sai Praneeth Potladurthy, UC San Diego│Jeong-Hoon Kim, UC San Diego│Weihong Xu, UC San Diego│Flavio Ponzina, UC San Diego│Seonghyun Kim, SK Hynix│Ertugrul Cubukcu, UC San Diego│Tajana Rosing, UC San Diego│Gert Cauwenberghs, UC San Diego│Duygu Kuzum, UC San Diego

13-7: MRAM Design-Technology-System Co-Optimization for Artificial Intelligence Edge Devices

Win-San Khwa, Corporate Research, TSMC, Taiwan│Yi-Lun Lu, Corporate Research, TSMC, Taiwan│Sai Qian Zhang, Meta Reality Lab Research, Meta Platforms, Inc., USA│Xiaoyu Sun, Corporate Research, TSMC, USA│Syed Shakib Sarwar, Meta Reality Lab Research, Meta Platforms, Inc., USA│Ziyun Li, Meta Reality Lab Research, Meta Platforms, Inc., USA│Wu-Wun Chen, Corporate Research, TSMC, Taiwan│Jui-Jen Wu, Corporate Research, TSMC, Taiwan│Xiaochen Peng, Corporate Research, TSMC, USA│Kerem Akarvardar, Corporate Research, TSMC, USA│Ming-Yuan Song, Corporate Research, TSMC, Taiwan│Hung-Li Chiang, Corporate Research, TSMC, Taiwan│Xinyu Bao, Corporate Research, TSMC, USA│Yu-Jen Wang, Embedded Technology Division, TSMC, Taiwan│Wen-Ting Chu, Embedded Technology Division, TSMC, Taiwan│Harry Chuang, Embedded Technology Division, TSMC, Taiwan│Yu-Der Chih, Design Technology Platform, TSMC, Taiwan│Tsung-Yung Jonathan Chang, Design Technology Platform, TSMC, Taiwan│Barbara De Salvo, Meta Reality Lab Research, Meta Platforms, Inc., USA│Chiao Liu, Meta Reality Lab Research, Meta Platforms, Inc., USA│Meng-Fan Chang, Corporate Research, TSMC, Taiwan

13-8: Excellent Synaptic Characteristics and Half-bias selectivity in Vertical Short-channel ECRAM and selector-free 4k Cross-point Array Demonstration

Jeonghoon Son, POSTECH│Seungkun Kim, POSTECH│Jimin Lee, POSTECH│Byungwoo Lee, POSTECH│Hyunjeong Kwak, POSTECH│Jinho Byun, POSTECH│Jiyong Woo, Kyungpook National University│Seyoung Kim, POSTECH

Session 14 Focus Session | Emerging Neural Interface Technologies for Human Interfacing

9:00 AM Continental 4

Co-Chairs: Xiaoting Jia, Virginia Tech and Dion Khodagholy, UC-Irvine

14-1: Skin-Inspired Sensors and Integrated Circuits for Wearables and Implantables (Invited)

Zhenan Bao, Stanford University│Can Wu, Stanford University│Weicheng Wang, Stanford University│Donglai Zhong, Stanford University

14-2: Neuropixels probe: A 130nm/55nm CMOS-based integrated Multimodal Microsystems Technology Platform for large scale Brain Wide Recording

Barundeb Dutta, IMEC│Alexandru Andrei, IMEC│Hasan Mahmud-Ul, IMEC│Matt McDonald, IMEC│Pieter Neutens, IMEC│John O’Callaghan, IMEC│Jan Putzeys, IMEC│Bogdan Raducanu, IMEC│Chutham Sawigun, IMEC│Enrico Tonon, IMEC│Xiaolin Yang, IMEC│Simone Severi, IMEC│Marleen Welkenhuysen, IMEC│Carolina Lopez, IMEC│Harrie Tilmans, IMEC

14-3: In vivo neural stimulation and recording using flexible nanoelectronics

Jia Liu, Harvard University│Ren Liu, Harvard University│Xinhe Zhang, Harvard University

14-4: A high quality and minimal invasive interventional brain machine interface system based on neural spiking activities

Zhengtuo Zhao, Institute of Neuroscience, Center for Excellence in Brain Science and Intelligence Technology, Chinese Academy of Sciences│Xingzhao Wang, Institute of Neuroscience, Center for Excellence in Brain Science and Intelligence Technology, Chinese Academy of Sciences│Zhigang Yang, Zhongshan Hospital│Chi Ren, Institute of Neuroscience, Center for Excellence in Brain Science and Intelligence Technology, Chinese Academy of Sciences│Xue Li, Institute of Neuroscience, Center for Excellence in Brain Science and Intelligence Technology, Chinese Academy of Sciences

14-5: Novel materials and electronics for soft neural interfaces

Paul Le Floch, Axoft│Hyunsu Park, Axoft, Inc.│Xian Gong, Axoft, Inc.│Anika Parekh, Axoft, Inc.│Jia Liu, Harvard University│Tianyang Ye, Axoft

14-6: Time Domain-Based Oscillatory Feature Extraction for High Spatiotemporal Resolution Nerophysiologic Data

Jennifer Gelinas, University of California Irvine│Liang Ma, Columbia University│Tristan Sands, Columbia University Irving Medical Center│Dion Khodagholy, University of California Irvine

Session 15 Emerging Device and Compute Technology (EDT) | Memory and Computing Enabled by Material Innovations

9:00 AM Continental 5

Co-Chairs: Adrian Ionescu, EPFL and Hyejung Choi, SK-Hynix

15-1: Variation Tolerant and Energy-Efficient Charge Domain Compute-in-Memory Array with Binary and Multi-Level Cell Ferroelectric FET

Jiahui Duan, University of Notre Dame│Yixin Xu, Pennsylvania State University│Zijian Zhao, University of Notre Dame│Anni Lu, Georgia Institute of Technology│James Read, Georgia Institute of Technology│Mohsen Imani, University of California, Irvine│Thomas Kampfe, Fraunhofer IPMS│Mike Niemier, University of Notre Dame│Xiao Gong, National University of Singapore│Shimeng Yu, Georgia Institute of Technology│Vijaykrishnan Narayanan, Pennsylvania State University│Kai Ni, University of Notre Dame

15-2: Ferroelectric materials and their applications for next-generation integrated devices

Thomas Mikolajick, TU Dresden and NaMLab│Uwe Schroeder, NaMLab gGmbH│Patrick Lomenzo, NaMLab gGmbH│Stefan Slesazeck, NaMLab gGmbH│Suzanne Lancaster, NaMLab gGmbH

15-3: Edge Continual Training and Inference with RRAM-Gain Cell Memory Integrated on Si CMOS

Shuhan Liu, Stanford University│Robert Radway, Stanford University│Xinxin Wang, Stanford University│Filippo MORO, CEA-Leti│Jean-François NODIN, CEA-Leti│Koustav Jana, Stanford University│Shuting Du, Purdue University│Luke Upton, Stanford University│Wei-Chen Chen, Stanford University│Jian Chen, Stanford University│Haitong Li, Purdue University│Francois ANDRIEU, CEA-Leti│Elisa VIANELLO, CEA-Leti│Priyanka Raina, Stanford University│Subhasish Mitra, Stanford University│H.-S. Philip Wong, Stanford University

15-4: Record-Low Coercive Field in ALD-Grown HZO Ferroelectric Films: Enabling Ultra-low Operation Voltage in World’s First 2-Layer 3D Stacked Oxide Semiconductor 1T1C FeRAM

Wei Shi, National University of Singapore│Dong Zhang, National University of Singapore│Zijie Zheng, National University of Singapore│Zuopu Zhou, National University of Singapore│Kaizhen Han, National University of Singapore│Chen Sun, National University of Singapore│Qiwen Kong, National University of Singapore│Yang Feng, National University of Singapore│Xiao Gong, National University of Singapore

15-5: Cryogenic Analog 1T-ReRAM with Enhanced Dynamic Range and Suppressed Noise for Cold Neural Networks

Saketh Ram Mamidala, IBM Research Europe - Zurich│Davide Lombardo, IBM Research Europe - Zurich│Elisa Zaccaria, IBM Research Europe - Zurich│Donato Falcone, IBM Research Europe - Zurich│Tommaso Stecconi, IBM Research Europe - Zurich│Antonio La Porta, IBM Research Europe - Zurich│Marilyne Sousa, IBM Research Europe - Zurich│Steffen Reidt, IBM Research Europe - Zurich│Alberto Ferraris, IBM Research Europe - Zurich│Cezar Zota, IBM Research Europe - Zurich│Valeria Bragaglia, IBM Research Europe - Zurich│Bert Jan Offrein, IBM Research Europe - Zurich

15-6: Reconfigurable Neurotransistors Based on Wide-bandgap Semiconductors for Adaptive Reservoir Computing

Tao Chen, The Hong Kong University of Science and Technology│Zheyang Zheng, The Hong Kong University of Science and Technology│Sirui Feng, The Hong Kong University of Science and Technology│Li Zhang, The Hong Kong University of Science and Technology│Yan Cheng, The Hong Kong University of Science and Technology│Yat Hon Ng, The Hong Kong University of Science and Technology│Kevin Chen, The Hong Kong University of Science and Technology

Session 16 Power, Microwave/Mm-Wave and Analog Devices/Systems (PMA) | High Frequency and Cryogenic RF

9:00 AM Continental 6

Co-Chairs: Troy OLSSON, University of Pennsylvania and Brianna KLEIN, Sandia National Laboratories

16-1: Polarization Enhanced GaN Complementary Logic Circuits with Short Propagation Delay

Teng Li, School of Integrated Circuits, Peking University, Beijing, China│Jin Wei, School of Integrated Circuits, Peking University, Beijing, China│Meng Zhang, College of Microelectronics, Beijing University of Technology, Beijing, China│Jingjing Yu, School of Integrated Circuits, Peking University, Beijing, China│Yunhong Lao, School of Integrated Circuits, Peking University, Beijing, China│Sihang Liu, School of Integrated Circuits, Peking University, Beijing, China│Ming Zhong, School of Integrated Circuits, Peking University, Beijing, China│Jiawei Cui, School of Integrated Circuits, Peking University, Beijing, China│Junjie Yang, School of Integrated Circuits, Peking University, Beijing, China│Han Yang, School of Physics, Peking University, Beijing, China│Xuelin Yang, School of Physics, Peking University, Beijing, China│Zheyang Zheng, School of Microelectronics, University of Science and Technology of China, Hefei, China│Maojun Wang, School of Integrated Circuits, Peking University, Beijing, China│Kevin J. Chen, Dept. of ECE, Hong Kong University of Science and Technology, Hong Kong, China│Bo Shen, School of Physics, Peking University, Beijing, China

16-2: Up to 48 GHz mmWave Ferroelectric Sc0.3Al0.7N Bulk Acoustic Wave Resonators and Filters

Chen Liu, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│You Qian, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Ying Zhang, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Xinghua Wang, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Minghua Li, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Peng Liu, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Huamao Lin, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Qingxin Zhang, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)│Yao Zhu, Institute of Microelectronics (IME), Agency for Science, Technology and Research (ASTAR)

16-3: Predefined Novel Piezo-on-Insulator (PN-POI) Substrates for 5G/6G Acoustic Devices

Xinjian Ke, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Jinbo Wu, Shanghai Xin Ou Integration Technology Co., Ltd.│Shibin Zhang, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Xiaoli Fang, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Pengcheng Zheng, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Liping Zhang, Shanghai Xin Ou Integration Technology Co., Ltd.│Dan Ling, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Juxing He, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Kai Huang, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences│Xin Ou, State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences

16-4: Heterogeneous and Monolithic 3D (HM3D) Integrated RF Circuits: HM3D Integration of InGaAs HEMTs on CMOS-Based Backside Passive Devices

Jaeyong Jeong, KAIST│Minsik Park, Chungnam National University│Yoon-Je Suh, KAIST│Jeong-Taek Lim, Chungnam National University│Minkyoung Seong, NNFC│Jooseok Lee, Samsung Electronics│Kihyun Kim, Samsung Electronics│Nahyun Rheem, KAIST│Chan Jik Lee, KAIST│Bong Ho Kim, KAIST│Seong Kwang Kim, Samsung Electronics│Joon Pyo Kim, KAIST│Jongmin Kim, KANC│Woo-Suk Sul, NNFC│Won-Chul Lee, NNFC│Choul-Young Kim, Chungnam National University│Jongwon Lee, Chungnam National University│Sanghyeon Kim, KAIST

16-5: InP-Based Resonant-Tunneling-Diode Oscillators with Milliwatt Power Outputs in 600-700 GHz range

Safumi Suzuki, Tokyo Institute of Technology│Feifan Han, Tokyo Institute of Technology│Takumi Shimura, Tokyo Institute of Technology│Hiroki Tanaka, Tokyo Institute of Technology

16-6: First Demonstration of 60 GHz GaN IMPATT Oscillator with 12.7 dBm Output Power

Zhengliang Bian, Stanford University│Avery Marshall, QuinStar Inc│Lisette Zhang, QuinStar Inc│Tracy Lee, QuinStar Inc│Srabanti Chowdhury, Stanford University

16-7: Cryogenic InGaAs HEMTs with Record-Low On-Resistance using Optimized Channel Structure

EUNJUNG CHA, IBM Research Europe│Alberto Ferraris, IBM Research Europe│Daniele Caimi, IBM Research Europe│Hung-Chi Han, EPFL│Antonis Olziersky, IBM Research Europe│Marilyne Sousa, IBM Research Europe│Edoardo Charbon, EPFL│Cezar Zota, IBM Research Europe

Session 17 Modeling and Simulation (MS) | Selector-Only Memory and Ferroelectric Devices

9:00 AM Continental 7-9

Co-Chairs: Tzer-Min Shen, TSMC and Tzu-Hsuan (Bruce) Hsu, Macronix

17-1: Ab-initio Screening of Amorphous Chalcogenides for Selector-Only Memory (SOM) through Electrical Properties and Device Reliability

Ha-Jun Sung, Samsung Electronics│Minwoo Choi, Samsung Electronics│Youngjae Kang, Samsung Electronics│Kiyeon Yang, Samsung Electronics│Bonwon Koo, Samsung Electronics│Wu Zhe, Samsung Electronics│Hwasung Chae, Samsung Electronics│Chang Seung Lee, Samsung Electronics

17-2: Selector Only Memory: Exploring Atomic Mechanisms from First-Principles

Sergiu Clima, imec│Fabian Ducry, imec│Daniele Garbin, imec│Taras Ravsher, imec│Robin Degraeve, imec│Attilio Belmonte, imec│Gouri Sankar Kar, imec│Geoffrey Pourtois, imec

17-3: On the Origin of Holes During Polarization Reset in Floating Body Ferroelectric FETs Towards Improving Switching Efficiency

Zhouhang Jiang, University of Notre Dame│Yi Xiao, Pennsylvania State University│Milind Weling, EMD group│Halid Mulaosmanovic, GlobalFoundries Fab1 LLC & Co. KG│Stefan Duenkel, GlobalFoundries Fab1 LLC & Co. KG│Dominik Kleimaier, GlobalFoundries Fab1 LLC & Co. KG│Steven Soss, GlobalFoundries Fab1 LLC & Co. KG│Sven Beyer, GlobalFoundries Fab1 LLC & Co. KG│Rajiv Joshi, IBM Thomas J. Watson Research Center│Mohamed Mohamed, MIT Lincoln Laboratory│Scott Meninger, MIT Lincoln Laboratory│Xiao Gong, National University of Singapore│Vijaykrishnan Narayanan, Pennsylvania State University│Kai Ni, University of Notre Dame

17-4: Unveiling the Intricate Dynamic Charactristics of FeFETs with a MFMIS Structure: Experiment and Modeling

Xiaolin Wang, National University of Singapore (NUS)│Zijie Zheng, NUS│Leming Jiao, NUS│Xuanqi Chen, NUS│Yang Feng, NUS│Chen Sun, NUS│Zuopu Zhou, NUS│Dong Zhang, NUS│Gan Liu, NUS│Bich-Yen Nguyen, Soitec│Gengchiau Liang, NUS│Kai Ni, University of Notre Dame│Xiao Gong, NUS

17-5: First Observation of the Temperature-Dependent Two-phase Switching of the HfO2-based Ferroelectric Polarization: New Insights and Modeling of the Switching Dynamics

Leming Jiao, National University of Singapore│Zuopu Zhou, National University of Singapore│Zijie Zheng, National University of Singapore│Xiaolin Wang, National University of Singapore│Jiawei Xie, National University of Singapore│Dong Zhang, National University of Singapore│Qiwen Kong, National University of Singapore│Gengchiau Liang, National Yang-Ming Chiao Tung University│Xiao Gong, National University of Singapore

17-6: First Demonstration of Vertical 2T-nC FeRAM Hybrid Cell and Its Scalability for High-Density 3D Ferroelectric Capacitor Memory

Shan Deng, University of Notre Dame│Yi Xiao, Pennsylvania State University│Zhouhang Jiang, University of Notre Dame│Yixin Qin, University of Notre Dame│Renzheng Zhang, University of Notre Dame│Zijian Zhao, University of Notre Dame│John Howe, University of Notre Dame│Yushan Lee, University of Notre Dame│Jiahui Duan, University of Notre Dame│Rajiv Joshi, IBM Thomas J. Watson Research Center│Thomas Kämpfe, Fraunhofer IPMS│Tengfei Luo, University of Notre Dame│Tuo-Hung Hou, National Yang Ming Chiao Tung University│Xiao Gong, National University of Singapore│Vijaykrishnan Narayanan, Pennsylvania State University│Kai Ni, University of Notre Dame

Session 18 Sensors, Mems, and Bioelectronics (SMB) | Integrated Sensors and MEMS

9:00 AM Imperial A

Co-Chairs: Yao Zhu, A*STAR and Itaru Yanagi, Hitachi

18-1: Monolithic Fabrication of Micron-Scale Piezo-Polymer Transducers on CMOS

Volkan Arslan, Columbia University│Jakub Jadwiszczak, Columbia University│Jeffrey Sherman, Columbia University│Ilke Uguz, Columbia University│Kenneth Shepard, Columbia University

18-2: Design and Implementation of a Novel Dual-Gap CMOS-MEMS CMUT Array

Hung-Yu Chen, National Tsing Hua University│Clark Nguyen, University of California, Berkeley│Sheng-Shian Li, National Tsing Hua University

18-3: Subtractive Microfluidics in CMOS

Wei-Yang Weng, University of California, Berkeley│Alexander Di, University of California, Berkeley│Xiang Zhang, University of California, Berkeley│Ya-Chen Tsai, University of California, Berkeley│Yan-Ting Hsiao, National Taiwan University│Jun-Chau Chien, University of California, Berkeley

18-4: Emerging applications driving future MEMS Product and Technology development.

Anton Hofmeister, STMicroelectronics

18-5: Monolithic MEMS L-C Chip with Ultrahigh Performance Densities for PwrSoC Applications

Sixing Xu, Hunan University│Zhanpeng Shi, Hunan University│Jiyong Zhou, Hunan Univeristy│Jianyou Dai, Hunan University│Yier Xia, Tsinghua University│Minghao Xu, Tsinghua University│Zerui Xu, Tsinghua University│Jiezhen Liu, Hunan University│Wei Hu, Hunan University│Lei Shan, Hunan University│Xiaohong Wang, Tsinghua University│Lei Liao, Hunan University

18-6: Advanced Metal-assisted Chemical Etching using HF Vapor and Ozone for MEMS Process

Hyein Cho, Department of Chemical Engineering, Kangwon National University│Yebin Ahn, Department of Chemical Engineering, Kangwon National University│Sang Beom Song, Department of Chemical Engineering, Kangwon National University│Soohyeok Park, Department of Chemical Engineering, Kangwon National University│Yejin Han, Department of Chemical Engineering, Kangwon National University│Geonhwi Kim, Department of Chemical Engineering, Kangwon National University│Eunjeong Song, Department of Energy Science and Technology, Chungnam National University│Ye Ji Choi, Department of Chemical Engineering, Kangwon National University│So Eun Jang, Department of Chemical Engineering, Kangwon National University│Duck Hyun Youn, Department of Chemical Engineering, Kangwon National University│Hyeyoung Shin, Department of Energy Science and Technology, Chungnam National University│Han-Don Um, Department of Chemical Engineering, Kangwon National University

18-7: Intelligent Multimodal Sensors Integrating Gas, Barometric Pressure, and Temperature Sensing

Gyuweon Jung, Seoul National University│Hyeongsu Kim, Seoul National University│Chayoung Lee, Seoul National University│Jaehyeon Kim, Seoul National University│Woo Young Choi, Seoul National University│Jong-Ho Lee, Seoul National University

Session 19 Reliability Of Systems and Devices (RSD) | Emerging Devices: Security Applications and Reliability

9:00 AM Imperial B

Co-Chairs: Azad Naeemi, Gatech and Ming-Yi Lee, Macronix

19-1: First Demonstration of High Throughput and Reliable Homomorphic Encryption Using FeFET Arrays for Resource-Limited IoT Clients

Hanyong Shao, Peking University│Yuejia Zhou, Peking University│Zhiyuan Ning, Peking University│Wenpu Luo, Peking University│Xinyu Bin, University of Science and Technology of China│Jinghao Yang, Peking University│Kechao Tang, Peking University│Ru Huang, Peking University

19-2: First Demonstration of Unclonable Double Encryption 28nm RRAM-based Compute-in-Memory Macro for Confidential AI

Yiyang Chen, School of Integrated Circuits, Peking University│Lixia Han, School of Integrated Circuits, Peking University│Ao Shi, School of Integrated Circuits, Peking University│Lianliang Wu, School of Integrated Circuits, Peking University│Hairuo Lu, School of Integrated Circuits, Peking University│Jiaqi Li, School of Integrated Circuits, Peking University│Haozhang Yang, School of Integrated Circuits, Peking University│Yulin Feng, School of Integrated Circuits, Peking University│Zheng Zhou, School of Integrated Circuits, Peking University│Lifeng Liu, School of Integrated Circuits, Peking University│Xiaoyan Liu, School of Integrated Circuits, Peking University│Jinfeng Kang, School of Integrated Circuits, Peking University│Peng Huang, School of Integrated Circuits, Peking University

19-3: First Demonstration of Masked Polynomial Multiplier based on 40nm 1TG1R RRAM Secure Chip for Lattice-based Cryptography

Jingwei Sun, Peking University│Zongwei Wang, Peking University│Haoyang Gu, Peking University│Lin Bao, Peking University│Qishen Wang, Peking University│Shengyu Bao, Peking University│Linbo Shan, Peking University│Ling Liang, Peking University│Yimao Cai, Peking University│Ru Huang, Peking University

19-4: A Fully BEOL-compatible (300℃ Annealing) IGZO FeFET with Ultra-high Memory Window (10V) and Prominent Endurance (109)

Pan Xu, University of Chinese Academy of Sciences│Pengfei Jiang, Institute of Microelectronics, Chinese Academy of Sciences│Yang Yang, Institute of Microelectronics, Chinese Academy of Sciences│Xueyang Peng, University of Chinese Academy of Sciences│Wei Wei, Institute of Microelectronics, Chinese Academy of Sciences│Tiancheng Gong, Institute of Microelectronics, Chinese Academy of Sciences│Yuan Wang, Institute of Microelectronics, Chinese Academy of Sciences│Xiao Long, Institute of Microelectronics, Chinese Academy of Sciences│Jiebin Niu, Institute of Microelectronics, Chinese Academy of Sciences│Zhenhua Wu, Institute of Microelectronics, Chinese Academy of Sciences│Qing Luo, Institute of Microelectronics, Chinese Academy of Sciences│Ming Liu, Institute of Microelectronics, Chinese Academy of Sciences

19-5: Understanding the Variability in GeAsTe Ovonic Threshold Switching Devices

Zeyu Hu, Liverpool John Moores University│Guosheng Wang, Liverpool John Moores University│Zheng Chai, Xi’an Jiaotong University│Weidong Zhang, Liverpool John Moores University│Daniele Garbin, imec│Robin Degraeve, imec│Sergiu Clima, imec│Taras Ravsher, imec│Andrea Fantini, imec│Jian Zhang, Liverpool John Moores University│Attilio Belmonte, imec│Gouri Kar, imec

19-6: Magnetic immunity of STT-MRAM: external magnetic field orientation impact on writing reliability

Natan Vander Meeren, KU Leuven│Simon Van Beek, imec│Maxwel Monteiro, imec│Fernando Garcia-Redondo, imec│Jyotirmoy Chatterjee, imec│Ankit Kumar, imec│Kurt Wostyn, imec│Sebastien Couet, imec│Ingrid Verbauwhede, KU Leuven

19-7: Integrated circuits based on two-dimensional materials

Saptarshi Das, Pennsylvania State University│Dipanjan Sen, Pennsylvania State University│Subir Ghosh, Pennsylvania State University│Rameez Raja Shaik, Pennsylvania State University│Harikrishnan Ravichandran, Pennsylvania State University

Session 20 Memory Technology (MT) | Selector Based and Charge-trap Based Memories

2:15 PM Grand Ballroom A

Co-Chairs: Andrea Redaelli, STM and Swati Saha, Infineon

20-1: Reliable memory operation with low read disturb rate in the world smallest 1Selector-1MTJ cell for 64 Gb cross-point MRAM

Hisanori Aikawa, Kioxia Korea Corporation│Jeonghwan Song, SK hynix│Toshihiko Nagase, Kioxia Korea Corporation│Soo Man Seo, SK hynix│Yuichi Ito, Kioxia Korea Corporation│Tae Jung Ha, SK hynix│Kenichi Yoshino, Kioxia Korea Corporation│Bo Kyung Jung, SK hynix│Tadaaki Oikawa, Kioxia Korea Corporation│Ku Youl Jung, SK hynix│Su Jin Chae, SK hynix│Bum Su Kim, SK hynix│Min Chul Shin, SK hynix│Dong Keun Kim, SK hynix│Tae Ho Kim, SK hynix│Kosuke Hatsuda, Kioxia Corporation│Katsuhiko Hoya, Kioxia Corporation│Soo Gil Kim, SK hynix│Jae Yun Yi, SK hynix│Seon Yong Cha, SK hynix

20-2: VT window model of the Single-chalcogenide Xpoint Memory (SXM)

Paolo Fantini, Micron Technology Inc.│Andrea Ghetti, Micron Technology Inc.│Enrico Varesi, Micron Technology Inc.│Agostino Pirovano, Micron Technology Inc.│Dario Baratella, University of Milano-Bicocca│Chiara Ribaldone, University of Milano-Bicocca│Davide Campi, University of Milano-Bicocca│Marco Bernasconi, University of Milano-Bicocca│Roberto Bez, Micron Technology Inc.

20-3: Achieving 3-bit Operation in Selector-only-memory by Controlling Variability with Microwave Annealing and Bipolar Pulse Scheme

Laeyong Jung, POSTECH│Jangseop Lee, POSTECH│Yoori Seo, POSTECH│Hyunsang Hwang, POSTECH

20-4: Penta-level charge trap-based 3D NAND flash memory enabled by bi-directional step-pulse-programming and improvement of cell channel process

Changhyun Lee, SKhynix America Inc│Dengtao Zhao, SKhynix America Inc│Kyeongran Yoo, SKhynix America Inc│Mohammad Sharbati, SKhynix America Inc│Paing Htet, SKhynix America Inc│Yunsu Kim, SKhynix Inc│Bongyeol Park, SKhynix Inc│Hansoo Joo, SKhynix Inc│Hyeokjun Choi, SKhynix Inc│Soonok Seo, SKhynix Inc│Dawon Kim, SKhynix Inc│Jaewoong Kim, SKhynix Inc│Taeun Youn, SKhynix Inc│Insu Park, SKhynix Inc│Jaesung Sim, SKhynix Inc│Seongjo Park, SKhynix Inc│Sungtaeg Kang, SKhynix America Inc│Jungdal Choi, SKhynix America Inc

20-5: Spatial Charge Trap Engineering with Boron Nitride Barrier for 3D V-NAND Flash Memory

Dae Hyun Kang, KAIST│Jae Joong Jeong, KAIST│Young Keun Park, KAIST│Dong Hun Sin, Semiconductor R&D Center, Samsung Electronics│Han Mei Choi, Semiconductor R&D Center, Samsung Electronics│Byung Jin Cho, KAIST

20-6: A Novel Dual-Bit Charge Trapping Flash Cell with Operation Optimization for Standalone and Embedded Universal Applications

Zhexuan Li, Zhejiang University│Xiao Yu, Beijing PXMicro Technology Co., LTD.│Kun Ren, Zhejiang University│Dianyu Qi, Zhejiang University│Chunsheng Jiang, Guangxi Normal University│Zhengdong Shi, Beijing PXMicro Technology Co., LTD.│Yongyu Wu, Zhejiang ICsprout Semiconductor Co., Ltd.│Guangji Li, Zhejiang ICsprout Semiconductor Co., Ltd.│Yunhao Zhang, Zhejiang ICsprout Semiconductor Co., Ltd.│Zhiqiang Su, Beijing PXMicro Technology Co., LTD.│Jun Xu, Tsinghua University│Dawei Gao, Zhejiang University│Liyang Pan, Beijing PXMicro Technology Co., LTD.

20-7: Electrically Erasable Oxide-Semiconductor-Channel Charge Trap Flash Memory with Unipolar Operation

Seongmin Park, POSTECH│Chanyeong Go, POSTECH│Changmin Jeon, Samsung Electronics Co.│Yoonyoung Chung, POSTECH

Session 21 Focus Session | Leading Semiconductor Products and Advanced Packaging

2:15 PM Grand Ballroom B

Co-Chairs: Youseok Suh, Qualcomm and Tenko Yamashita, IBM

21-1: Co-Optimization of GPU AI Chip From Technology, Design, System and Algorithms

John Hu, Nvidia Corporation│Louis Liu, Nvidia Corporation│Shuhan Liu, Nvidia Corporation│Boonkhim Liew, Nvidia Corporation│David Guan, Nvidia Corporation│James Chen, Nvidia Corporation│Steven Jones, Nvidia Corporation│William Dally, Nvidia Corporation

21-2: Coevolution of Chiplet Technology and Cache Architecture for AI and Compute

John Wuu, AMD│Mike Mantor, AMD│Gabriel Loh, AMD│Alan Smith, AMD│Dave Johnson, AMD│David Fisher, AMD│Brett Johnson, AMD│Carson Henrion, AMD│Russell Schreiber, AMD│Jeff Lucas, AMD│Stephen Dussinger, AMD│Alistair Tomlinson, AMD│Will Walker, AMD│Paul Moyer, AMD│Deepak Kulkarni, AMD│Daniel Ng, AMD│Wonjun Jung, AMD│Raja Swaminathan, AMD│Samuel Naffziger, AMD

21-3: Heterogeneous Computing Platform for Power-Performance Efficient On-Device AI

Jie Deng, Qualcomm│Giri Nallapati, Qualcomm

21-4: Ultra-stacked Forksheet-FET and Monolithic Complementary-FET for Å7~5 node Visibility

Rockhyun Baek, Pohang University of Science and Technology (POSTECH)│Junjong Lee, Pohang University of Science and Technology (POSTECH)│Seungjoon Eom, Pohang University of Science and Technology (POSTECH)│Minchan Kim, Pohang University of Science and Technology (POSTECH)│Yonghwan Ahn, Pohang University of Science and Technology (POSTECH)│Seunghwan Lee, Pohang University of Science and Technology (POSTECH)│Jinsu Jeong, Pohang University of Science and Technology (POSTECH)│Sanguk Lee, Pohang University of Science and Technology (POSTECH)

21-5: Next Generation TSMC-SoIC® Platform for Ultra-High Bandwidth HPC Application

Yen-Ming Chen, TSMC│T. Ko, TSMC│K. C. Ting, TSMC│S. K. Goel, TSMC│A. Patidar, TSMC│K. H. Tam, TSMC│K. Huang, TSMC│W. P. Changchien, TSMC│W. Y. Wang, TSMC│S.H. Huang, TSMC│C. Y. Huang, TSMC│C. H. Wang, TSMC│W. Lai, TSMC│Y. H. Lung, TSMC│S. C. Lin, TSMC│S. F. Yeh, TSMC│C. W. Shih, TSMC│T. J. Wu, TSMC│Y. C. Lin, TSMC│Y. H. Chen, TSMC│H.J. Lin, TSMC│M.S. Yeh, TSMC│T. Y. Chen, TSMC│H. Y. Pan, TSMC│T. S. Lin, TSMC│C. C. Hu, TSMC│C. Bair, TSMC│S. B. Jan, TSMC│L.C. Hung, TSMC│L.W. Wang, TSMC│D.H. Chen, TSMC│C. H. Yao, TSMC│T. C. Huang, TSMC│J. H Shieh, TSMC│W. C. Chiou, TSMC│S.S. Lin, TSMC│Frank Lee, TSMC│Geoffrey Yeap, TSMC│L. C. Lu, TSMC│K. C. Hsu, TSMC

21-6: Tomorrow’s Modular & Scalable Compute Systems

Johanna Swan, Intel│Aleksandar Aleksov, Intel│Georgios Dogiamis, Intel│Adel Elsherbini, Intel

21-7: Implications of Wafer Bonding for Advanced Logic Technology Development

Sitaram Arkalgud, TEL│Christopher Netzband, TEL│Andrew Tuchman, TEL│Yoshihiro Kondo, TEL│Hirokazu Aizawa, TEL│Ilseok Son, TEL│Angelique Raley, TEL

21-8: D2W and W2W Hybrid bonding system with below 2.5 micron pitch for 3D chiplet AI applications

Katsuyuki Sakuma, IBM Research│Roy Yu, IBM Research│Nick Polomoff, IBM Research│Arvind Kumar, IBM Research│Sathya Raghavan, IBM Research│Michael Belyansky, IBM Research│Aakrati Jain, IBM Research│Ravi Bonam, IBM Research│Yasir Sulehria, IBM Research│Hsianghan Hsu, IBM Research│Kishan Jayanand, IBM Research│Hemanth Jagannathan, IBM Research

Session 22 Neuromorphic Computing (NC) | Stochastic and Spin-Based Computing

2:15 PM Continental 1-3

Co-Chairs: Elisabetta Chicca, University of Groningen and Christopher Bennett, Sandia National Laboratories

22-1: In-Memory Neural Stochastic Differential Equations with Probabilistic Differential Pair Achieved by In-Situ P-bit using CMOS Integrated Voltage-Controlled Magnetic Tunnel Junctions

Zhihua Xiao, The Hong Kong University of Science and Technology│Yaoru Hou, The Hong Kong University of Science and Technology│Zihan Tong, The Hong Kong University of Science and Technology│Yicheng Jiang, The Hong Kong University of Science and Technology│Yiyang Zhang, The Hong Kong University of Science and Technology│Xuezhao Wu, The Hong Kong University of Science and Technology│Albert Lee, InstonTech│Di Wu, InstonTech│Hao Cai, School of Integrated Circuit, Southeast University│Qiming Shao, The Hong Kong University of Science and Technology

22-2: Ising Solver using Weight Profile of Memristor Crossbar Array for Combinatorial Optimization

Kyuree Kim, Inha University│Sangwook Youn, Hanyang University│Jinwoo Park, Hanyang University│Hyungjin Kim, Hanyang University

22-3: Convolutions with Radio-Frequency Spin-Diodes

Julie Grollier, Laboratoire Albert Fert, CNRS, Thales, Université Paris-Saclay│Erwan Plouet, Laboratoire Albert Fert, CNRS, Thales, Université Paris-Saclay│Hanuman Singh, Laboratoire Albert Fert, CNRS, Thales, Université Paris-Saclay│Pankaj Sethi, Laboratoire Albert Fert, CNRS, Thales, Université Paris-Saclay│Frank Mizrahi, Laboratoire Albert Fert, CNRS, Thales, Université Paris-Saclay│Dédalo Sanz-Hernandez, Laboratoire Albert Fert, CNRS, Thales, Université Paris-Saclay

22-4: One-Step Combinatorial Optimization Solver with Fully Integrated Analog Memristors and Annealing Module

Keyi Shan, The University of Hong Kong│Mingrui Jiang, The University of Hong Kong│Zhiyuan Du, The University of Hong Kong│Yu Xiao, Zhejiang University│Yunwei Tong, The University of Hong Kong│Zefan Li, The University of Hong Kong│Szu-Hao Yang, The University of Hong Kong│Chengping He, The University of Hong Kong│Ruibin Mao, The University of Hong Kong│Peng Lin, Zhejiang University│Can Li, The University of Hong Kong

22-5: Dual-Function Unipolar Top-pSOT-MRAM for All-Spin Probabilistic Computing with Ultra-Dense Coupling and Adaptive Temporal Coding

Chen-Yu Yang, National Yang Ming Chiao Tung University│Ming-Chun Hong, National Yang Ming Chiao Tung University│Le-Chih Cho, Taiwan Semiconductor Research Institute│Baofang Cai, National University of Singapore│Yi-Ju Chen, Taiwan Semiconductor Research Institute│Cho-Lun Hsu, Taiwan Semiconductor Research Institute│Kai-Shin Li, Taiwan Semiconductor Research Institute│Geng-Chiau Liang, National Yang Ming Chiao Tung University│Tuo-Hung Hou, National Yang Ming Chiao Tung University

22-6: Beyond Ising: Mixed Continuous Optimization with Gaussian Probabilistic Bits using Stochastic MTJs

Nihal Singh, Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, CA, 93106, USA│Corentin Delacour, Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, CA, 93106, USA│Shaila Niazi, Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, CA, 93106, USA│Kemal Selcuk, Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, CA, 93106, USA│Daniel Golenchenko, Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, CA, 93106, USA│Haruna Kaneko, Research Institute of Electrical Communication, Tohoku University, Sendai, 980-8579, Japan│Shun Kanai, Research Institute of Electrical Communication, Tohoku University, Sendai, 980-8579, Japan│Hideo Ohno, Graduate School of Engineering, Tohoku University, Sendai, 980-8577, Japan│Shunsuke Fukami, Research Institute of Electrical Communication, Tohoku University, Sendai, 980-8579, Japan│Kerem Camsari, Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, CA, 93106, USA

Session 23 Optoelectronics, Displays, and Imaging Systems (ODI) | Displays and Photonic Platforms

2:15 PM Continental 4

Co-Chairs: Rainer Minixhofer, ams OSRAM and Matteo Buffolo, University of Padova

23-1: Integrated Quantum Dot Lasers and High Capacity Silicon Photonic Integrated Circuits

John Bowers, University of California Santa Barbarba (UCSB), USA│Rosalyn Koscica, Univ of California Santa Barbara│Alec Skipper, Univ of California Santa Barbara│Kaiyin Feng, Univ of California Santa Barbara│Chen Shang, Univ of California Santa Barbara│Andrew Clark, IQE│Peter Ludewig, NAsP III-V│David Harame, RF SUNY Polytechnic Institute

23-2: First Photon-Trapping InGaAs Avalanche Photodiode and Its Integration on the SOI Platform

Rui Shao, National University of Singapore│Jishen Zhang, National University of Singapore│Kian Hua Tan, National University of Singapore│Satrio Wicaksono, National University of Singapore│Haiwen Xu, National University of Singapore│Yue Chen, National University of Singapore│Xuanqi Chen, National University of Singapore│Yuxuan Wang, National University of Singapore│Chen Sun, National University of Singapore│Qiwen Kong, National University of Singapore│Xuanyao Fong, National University of Singapore│Xiao Gong, National University of Singapore

23-3: Silicon Photonics Platform for Next Generation Data Communication Technologies

S.K. Yeh, Taiwan Semiconductor Manufacturing Company│C.T. Shih, Taiwan Semiconductor Manufacturing Company│F. Yuan, Taiwan Semiconductor Manufacturing Company│C.M. Hung, Taiwan Semiconductor Manufacturing Company│C.H. Chu, Taiwan Semiconductor Manufacturing Company│H.Y. Lu, Taiwan Semiconductor Manufacturing Company│J.H. Yang, Taiwan Semiconductor Manufacturing Company│W.S. Lo, Taiwan Semiconductor Manufacturing Company│C.H. Chen, Taiwan Semiconductor Manufacturing Company│S.Y. Tsai, Taiwan Semiconductor Manufacturing Company│W.C. Tai, Taiwan Semiconductor Manufacturing Company│S.C. Liu, Taiwan Semiconductor Manufacturing Company│S.D. Wang, Taiwan Semiconductor Manufacturing Company│K.Q. Wen, Taiwan Semiconductor Manufacturing Company│W.C. Wang, Taiwan Semiconductor Manufacturing Company│C.C. Tung, Taiwan Semiconductor Manufacturing Company│B.T. Lin, Taiwan Semiconductor Manufacturing Company│F. Hu, Taiwan Semiconductor Manufacturing Company│P.C. Yeh, Taiwan Semiconductor Manufacturing Company│C.H. Huang, Taiwan Semiconductor Manufacturing Company│T.H. Wu, Taiwan Semiconductor Manufacturing Company│C.C. Chu, Taiwan Semiconductor Manufacturing Company│W.C. Kuo, Taiwan Semiconductor Manufacturing Company│C.Y. Tsai, Taiwan Semiconductor Manufacturing Company│S.W. Chang, Taiwan Semiconductor Manufacturing Company│E.C. Chen, Taiwan Semiconductor Manufacturing Company│C.W. Chiang, Taiwan Semiconductor Manufacturing Company│Y.M. Wang, Taiwan Semiconductor Manufacturing Company│F.C. Huang, Taiwan Semiconductor Manufacturing Company│S.M. Wu, Taiwan Semiconductor Manufacturing Company│J.Y. Lin, Taiwan Semiconductor Manufacturing Company│C.T. Tang, Taiwan Semiconductor Manufacturing Company│W.K. Liu, Taiwan Semiconductor Manufacturing Company│T.L. Hsieh, Taiwan Semiconductor Manufacturing Company│W.J. Mao, Taiwan Semiconductor Manufacturing Company│W.T. Lo, Taiwan Semiconductor Manufacturing Company│C.Y. Peng, Taiwan Semiconductor Manufacturing Company│S.H. Su, Taiwan Semiconductor Manufacturing Company│F. Tsui, Taiwan Semiconductor Manufacturing Company│N. Shi, Taiwan Semiconductor Manufacturing Company│V. Shih, Taiwan Semiconductor Manufacturing Company│S.F. Huang, Taiwan Semiconductor Manufacturing Company

23-4: Multi-modal Full-area High-resolution Human-Machine Interactive Surface with 3D Stacking of IGZO TFT Active-Matrix Capacitive and Optical Sensing Arrays

Yu Huang, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Jun Li, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Tong Shan, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Rongrong Shi, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Zhifan Zhang, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Li’ang Deng, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Mengwei Si, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Wei Tang, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Xiaojun Guo, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China

23-5: Flexible Active-matrix Micro-LED Display Utilizing InSnO TFTs with High Mobility of 39.1 cm2V-1s-1 and Mass-production Compatible Process

Zuoxu Yu, School of Integrated Circuits, National ASIC System Engineering Research Center, Southeast University│Yimeng Sang, Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials, School of Electronic Science and Engineering, Nanjing University│Yuzhen Zhang, School of Integrated Circuits, National ASIC System Engineering Research Center, Southeast University│Yiyang Zhang, School of Integrated Circuits, Nanjing University│Runxiao Shi, School of Integrated Circuits, National ASIC System Engineering Research Center, Southeast University│Siyang Liu, School of Integrated Circuits, National ASIC System Engineering Research Center, Southeast University│Tao Tao, Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials, School of Electronic Science and Engineering, Nanjing University│Xifeng Li, Key Laboratory of Advanced Display and System Applications of the Ministry of Education, Shanghai University│Cong Peng, Key Laboratory of Advanced Display and System Applications of the Ministry of Education, Shanghai University│Rong Zhang, Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials, School of Electronic Science and Engineering, Nanjing University│Wangran Wu, School of Integrated Circuits, National ASIC System Engineering Research Center, Southeast University│Zhe Zhuang, School of Integrated Circuits, Nanjing University│Bin Liu, Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials, School of Electronic Science and Engineering, Nanjing University│Weifeng Sun, School of Integrated Circuits, National ASIC System Engineering Research Center, Southeast University

23-6: Zero-bezel Flexible Active-matrix Micro-LED Display Using Through-plastic Vias and Its Seamless Tiling

Hiroshi Tsuji, NHK│Tatsuya Takei, NHK│Masashi Miyakawa, NHK│Toshihiro Yamamoto, NHK Foundation│Genichi Motomura, NHK│Yoshihide Fujisaki, NHK│Mitsuru Nakata, NHK

Session 24 Emerging Device and Compute Technology (EDT) | Advancements in 2D Material Devices

2:15 PM Continental 5

Co-Chairs: Nazila Haratipour, Kepler Computing and Farnaz Niroui, MIT

24-1: Direct growth and manufacturing of single-crystalline 2D FETs on 8-inch Si wafers

Min Seok Yoo, Samsung Advanced Institute of Technology, Samsung Electronics│Alum Jung, Samsung Advanced Institute of Technology, Samsung Electronics│Suk Yang, Semiconductor R&D Center, Samsung Electronics│Joung Eun Yoo, Samsung Advanced Institute of Technology, Samsung Electronics│Eun-Kyu Lee, Samsung Advanced Institute of Technology, Samsung Electronics│Kyung-Eun Byun, Samsung Advanced Institute of Technology, Samsung Electronics│Jaeyoon Baik, Beamline Division, Pohang Accelerator Laboratory, POSTECH│Dong-Jin Yun, Samsung Advanced Institute of Technology, Samsung Electronics│Jaehyun Park, Semiconductor R&D Center, Samsung Electronics│Jeehwan Kim, Samsung Advanced Institute of Technology, Samsung Electronics│Minsu Seol, Samsung Advanced Institute of Technology, Samsung Electronics

24-2: The critical role of 2D TMD interfacial layers for pFET performance

Tien Dat Ngo, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Xiangyu Wu, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Chelsey Dorow, Intel Foundry Technology Research, Intel Corporation, Hillsboro, OR 97214, USA│Robert Kimes Grubbs, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Luis Pinotti, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Daire Cott, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Kaustuv Banerjee, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Henry Medina Silva, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Ilse Hoflijk, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Anja Vanleenhove, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Inge Vaesen, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Thierry Conard, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Souvik Ghosh, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Olivier Richard, imec, Remisebosweg 1, B-3001 Leuven, Belgium│FionaCrystal Mascarenhas, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Luca Mana, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Danielle Vanhaeren, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Thomas Nuytten, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Fengben Xi, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Kirby Maxey, Intel Foundry Technology Research, Intel Corporation, Hillsboro, OR 97214, USA│Azimkhan Kozhakhmetov, Intel Foundry Technology Research, Intel Corporation, Hillsboro, OR 97214, USA│Nazmul Arefin, Global Sourcing for Equipment and Materials, Intel Corporation, Hillsboro, OR 97214, USA│Sergej Pasko, AIXTRON SE, Herzogenrath 52134, Germany│Simonas Krotkus, AIXTRON SE, Herzogenrath 52134, Germany│Jan Mischke, AIXTRON SE, Herzogenrath 52134, Germany│Salim EL Kazzi, AIXTRON SE, Herzogenrath 52134, Germany│Matthew Metz, Intel Foundry Technology Research, Intel Corporation, Hillsboro, OR 97214, USA│Kevin O’Brien, Intel Foundry Technology Research, Intel Corporation, Hillsboro, OR 97214, USA│Uygar Avci, Intel Foundry Technology Research, Intel Corporation, Hillsboro, OR 97214, USA│Cesar Javier Lockhart de la Rosa, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Gouri Sankar Kar, imec, Remisebosweg 1, B-3001 Leuven, Belgium│Bogdan Govoreanu, imec, Remisebosweg 1, B-3001 Leuven, Belgium

24-3: Gate oxide module development for scaled GAA 2D FETs enabling SS<75mV/d and record Idmax>900µA/µm at Lg<50nm

Wouter Mortelmans, Intel│Pratyush Buragohain, Intel│Ande Kitamura, Intel│Chelsey Dorow, Intel│Carly Rogan, Intel│Lutfe Siddiqui, Intel│Rahul Ramamurthy, Intel│Jennifer Lux, Intel│Ting Zhong, Intel│Shane Harlson, Intel│Eric Gillispie, Intel│Tyrone Wilson, Intel│Raphael Toku, Intel│Adedapo Oni, Intel│Ashish Penumatcha, Intel│Mahmut Kavrik, Intel│Marc Jaikissoon, Intel│Kirby Maxey, Intel│Azimkhan Kozhakhmetov, Intel│Chi-Yin Cheng, Intel│Chia-Ching Lin, Intel│Sudarat Lee, Intel│Andrey Vyatskikh, Intel│Nazmul Arefin, Intel│David Kencke, Intel│Joshua Kevek, Intel│Tristan Tronic, Intel│Matthew Metz, Intel│Scott Clendenning, Intel│Kevin O’Brien, Intel│Uygar Avci, Intel

24-4: Bilayer Alloy Contacts for High-Performance p-Type 2D Semiconductor Transistors

Amin Azizi, Corporate Research, TSMC, San Jose, CA, USA│Goutham Arutchelvan, Corporate Research, TSMC, Hsinchu, Taiwan│Nathaniel Safron, Corporate Research, TSMC, San Jose, CA, USA│Chih-Piao Chuu, Corporate Research, TSMC, Hsinchu, Taiwan│Yangjin Lee, University of California, Berkeley, CA, USA│Mehmet Dogan, University of California, Berkeley, CA, USA│D. Mahaveer Sathaiya, TCADD, TSMC, Hsinchu, Taiwan│H.-S. Philip Wong, Corporate Research, TSMC, Hsinchu, Taiwan│Marvin Cohen, University of California, Berkeley, CA, USA│Alex Zettl, University of California, Berkeley, CA, USA│Iuliana Radu, Corporate Research, TSMC, Hsinchu, Taiwan

24-5: Enhancement-Mode Multichannel MoS2 Transistor with Spacer Engineering and Design-Technology Co-Optimization Based on the 8" Platform

Jiadi Zhu, Massachusetts Institute of Technology│Aijia Yao, Massachusetts Institute of Technology│Peng Wu, Massachusetts Institute of Technology│Yixuan Jiao, Massachusetts Institute of Technology│Ji-Hoon Park, Massachusetts Institute of Technology│Jianfeng Jiang, Massachusetts Institute of Technology│Tilo Yang, Massachusetts Institute of Technology│Ayush Gupta, Massachusetts Institute of Technology│Suraj Cheema, Massachusetts Institute of Technology│Jing Kong, Massachusetts Institute of Technology│Tomas Palacios, Massachusetts Institute of Technology

24-6: Transfer free 2D CMOS multi bridge channel FET

Changhyun Kim, Samsung Advanced Institute of Technology│Junyoung Kwon, Samsung Advanced Institute of Technology│Min Seok Yoo, Samsung Advanced Institute of Technology│Hyun Mi Lee, Samsung Advanced Institute of Technology│Eunji Yang, Samsung Advanced Institute of Technology│Eun-Kyu Lee, Samsung Advanced Institute of Technology│Hyungjun Youn, Samsung Advanced Institute of Technology│Baekwon Park, Samsung Advanced Institute of Technology│Huije Ryu, Samsung Advanced Institute of Technology│Yoonhoo Ha, Samsung Advanced Institute of Technology│Haesung Kim, Samsung Advanced Institute of Technology│Woong Ko, Samsung Advanced Institute of Technology│Dongmin Kim, Samsung Advanced Institute of Technology│Dong-jin Yun, Samsung Advanced Institute of Technology│Jaehyun Park, Semiconductor R&D center, Samsung electronics│Minsu Seol, Samsung Advanced Institute of Technology│Jeehwan Kim, Massachusetts Institute of Technology│Kyung-Eun Byun, Samsung Advanced Institute of Technology

24-7: Scaling MoS2 transistors to 1 nm node

Weisheng Li, Nanjing University│Mingyi Du, Nanjing University│Chunsong Zhao, Huawei Technologies Co., LTD.│Guangkai Xiong, Nanjing University│Weizhuo Gan, Huawei Technologies Co., LTD.│Lei Liu, Nanjing University│Taotao Li, Nanjing University│Yuan Gao, Nanjing University│Fuchen Hou, Southern University of Science and Technology│Junhao Lin, Southern University of Science and Technology│Dongxu Fan, Nanjing University│Hao Qiu, Nanjing University│Zhihao Yu, Nanjing University of Posts and Telecommunications│Jeffrey Xu, Huawei Technologies Co., LTD.│Yi Shi, Nanjing University│Xinran Wang, Nanjing University

24-8: Low-Power CMOS Inverter with Enhancement-mode Operation and Matched VTH at VDD = 1 V on Monolayer 2D Material Channel

Ang-Sheng Chou, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Ching-Hao Hsu, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Yu-Tung Lin, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Fa-Rong Hou, Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei, Taiwan│Edward Chen, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Po-Sen Mao, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Ming-Yang Li, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Sui-An Chou, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Dawei Heh, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Hsiang-Chi Hu, Department of Electrophysics National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Yu-Sung Chang, Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei, Taiwan│Wen-Chia Wu, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Zih-Syuan Huang, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Yu-Wei Hsu, Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei, Taiwan│Yuan-Chun Su, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Terry Hung, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Po-Hsun Ho, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Tsung-En Lee, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Chen-Feng Hsu, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Goutham Arutchelvan, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Yun-Yan Chung, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Chao-Hsin Chien, Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Georgios Vellianitis, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Wei-Yen Woon, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Jin Cai, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Mark van Dal, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Wen-Hao Chang, Department of Electrophysics National Yang Ming Chiao Tung University, Hsinchu, Taiwan│Chih-I Wu, Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei, Taiwan│Chao-Ching Cheng, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan│Iuliana Radu, Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan

Session 25 Power, Microwave/Mm-Wave and Analog Devices/Systems (PMA)| High Voltage Wide Bandgap Power Devices

2:15 PM Continental 6

Co-Chairs: Zhikai TANG, Texas Instruments and Munetaka NOGUCHI, Mitsubishi Electric Corporation

25-1: Stacked Strongly Coupled GaN/SiC Cascode Device with Fast Switching and Reclaimed Strong dv/dt Control

Ji Shu, The Hong Kong University of Science and Technology│Heng Wang, The Hong Kong University of Science and Technology│Mian Tao, The Hong Kong University of Science and Technology│Yat Hon Ng, The Hong Kong University of Science and Technology│Sirui Feng, The Hong Kong University of Science and Technology│Yangming Du, The Hong Kong University of Science and Technology│Zongjie Zhou, The Hong Kong University of Science and Technology│Jiahui Sun, The Hong Kong University of Science and Technology│Ricky Shi-Wei Lee, The Hong Kong University of Science and Technology│Kevin Jing Chen, The Hong Kong University of Science and Technology

25-2: Low RonCrss Nomally-off Vertical GaN Transistor on GaN Substrate Using p-GaN Shield Structure for High-Power and High-Speed Switching

Naoki Torii, Panasonic Holdings Corporation│Daisuke Shibata, Panasonic Holdings Corporation│Masahiro Ogawa, Panasonic Holdings Corporation│Masao Kawaguchi, Panasonic Holdings Corporation│Hiroyuki Handa, Panasonic Holdings Corporation│Naohiro Tsurumi, Panasonic Holdings Corporation│Satoshi Tamura, Panasonic Holdings Corporation│Yoshio Okayama, Panasonic Holdings Corporation

25-3: 10-kV E-mode GaN Lateral Superjunction Transistor

Junjie Yang, School of Integrated Circuits, Peking University, Beijing, China│Jingjing Yu, School of Integrated Circuits, Peking University, Beijing, China│Jiawei Cui, School of Integrated Circuits, Peking University, Beijing, China│Sihang Liu, School of Integrated Circuits, Peking University, Beijing, China│Hao Chang, School of Integrated Circuits, Peking University, Beijing, China│Yunhong Lao, School of Integrated Circuits, Peking University, Beijing, China│Han Yang, School of Physics, Peking University, Beijing, China│Teng Li, School of Integrated Circuits, Peking University, Beijing, China│Xuelin Yang, School of Physics, Peking University, Beijing, China│Jinyan Wang, School of Integrated Circuits, Peking University, Beijing, China│Xiaosen Liu, School of Integrated Circuits, Tsinghua University, Beijing, China.│Yan Wang, School of Integrated Circuits, Tsinghua University, Beijing, China.│Maojun Wang, School of Integrated Circuits, Peking University, Beijing, China│Bo Shen, School of Physics, Peking University, Beijing, China│Jin Wei, School of Integrated Circuits, Peking University, Beijing, China

25-4: Thermionic Field Emission in a Si-doped AlN SBD with a Graded n±AlGaN Top Contact Layer

Takuya Maeda, The University of Tokyo│Yusuke Wakamoto, The University of Tokyo│Issei Sasaki, The University of Tokyo│Akihira Munakata, The University of Tokyo│Masanobu Hiroki, NTT Basic Research Lab.│Kazuyuki Hirama, NTT Basic Research Lab.│Kazuhide Kumakura, NTT Basic Research Lab.│Yoshitaka Taniyasu, NTT Basic Research Lab.

25-5: 10 kV, 250 oC Operational, Enhancement-Mode Ga2O3 JFET with Charge-Balance and Hybrid-Drain Designs

Yuan Qin, Virginia Polytechnic Institute and State University│Zineng Yang, Virginia Polytechnic Institute and State University│Hehe Gong, Virginia Polytechnic Institute and State University│Alan Jacobs, U.S. Naval Research Laboratory│Joseph Spencer, U.S. Naval Research Laboratory│Matthew Porter, Virginia Polytechnic Institute and State University│Bixuan Wang, Virginia Polytechnic Institute and State University│Kohei Sasaki, Novel Crystal Technology│Chia-Hung Lin, Novel Crystal Technology│Marko Tadjer, U.S. Naval Research Laboratory│Yuhao Zhang, Virginia Polytechnic Institute and State University

25-6: Cost-Effective 1200 V SiC MOSFETs on a Novel 150 mm SiC Engineered Substrate with Dummy-Grade Material Reuse

Xinhua Wang, Institute of Microelectronics, CAS│Xiangjie Xing, Institute of Microelectronics, CAS│Xiaolei Yang, Nanjing Electronic Devices Institute│Xin Yang, Virginia Tech University│Yan Chen, Institute of Microelectronics, CAS│Guoliang Ma, Wuhan University│Bixuan Wang, Virginia Tech University│Zhifei Zhao, Nanjing Electronic Devices Institute│Chao Yuan, Wuhan University│Yun Bai, Institute of Microelectronics, CAS│Sen Huang, Institute of Microelectronics, CAS│Yipei Lei, Institute of Microelectronics, CAS│Jingyuan Shi, Institute of Microelectronics, CAS│Fuchao Liu, TJ Innovative Semiconductor Substrate Technology Co., Ltd.│Yuhao Zhang, Virginia Tech University│Fenwen Mu, TJ Innovative Semiconductor Substrate Technology Co., Ltd.│Xinyu Liu, Institute of Microelectronics, CAS│Sheng Liu, Wuhan University│Yue Hao, Xidian University

25-7: 800-V Irradiation-Hardened Device Technology on GaN-on-SiC Power Integration Platform

Feng Zhou, Nanjing University│qi Wang, Harbin Institute of Technology│ming Liu, Harbin Institute of Technology│yang Xia, CorEnergy Semiconductor Company Ltd.│ke Wu, CorEnergy Semiconductor Company Ltd.│heng Li, CorEnergy Semiconductor Company Ltd.│gang Zhu, CorEnergy Semiconductor Company Ltd.│zong Xu, Nanjing University│fang Ren, Nanjing University│Dong Zhou, Nanjing University│jun Chen, Nanjing University│dou Zheng, Nanjing University│Rong Zhang, Nanjing University│dong Ye, Nanjing University│Hai Lu, Nanjing University

25-8: 1200 V GaN-on-Si Junction Barrier Schottky (JBS) Diodes by An E-Mode-Compatibe Process

Wensong Zou, Southern University of Science and Technology│Jiawei Chen, Southern University of Science and Technology│David Zhou, Shenzhen Pinghu Laboratory│Jinshi Zhang, JT Microelectronics Co., Ltd.│Ran Chen, JT Microelectronics Co., Ltd.│Xiong Liu, JT Microelectronics Co., Ltd.│Mengyuan Hua, Southern University of Science and Technology│Jun Ma, Southern University of Science and Technology

Session 26 Modeling and Simulation (MS) | Multi-scale Modeling of Transport, Interconnects and Reliability

2:15 PM Continental 7-9

Co-Chairs: Andries Scholten, NXP and Dipanjan Basu, Synopsys

26-1: Ballistic transport in state-of-the art In0.65Ga0.35As/In0.52Al0.48As quantum-well high-electron-mobility transistors at room and cryogenic temperatur

Seung-Woo Son, Kyungpook National University│In-Geun Lee, Kyungpook National University│Min-Seo Yu, Kyungpook National University│Su-Min Choi, Kyungpook National University│Yong-Soo Jeon, Kyungpook National University│Sang-Phyeong Son, Kyungpook National University│Ji-Hoon Yoo, Kyungpook National University│Jae-Hak Lee, Kyungpook National University│Kyunghoon Yang, KAIST│Dae-Hyun Kim, Kyungpook National University

26-2: Exploration and Analysis of Metallic, Optical, and Superconducting Cryo-Interconnects for Large-Scale Quantum Computers

Ankit Kumar, University of California, Santa Barbara│Aaron Kim, University of California, Santa Barbara│Kunjesh Agashiwala, University of California, Santa Barbara│Lin Xu, University of California, Santa Barbara│Arnab Pal, University of California, Santa Barbara│Wei Cao, University of California, Santa Barbara│Kaustav Banerjee, University of California, Santa Barbara

26-3: Scalable Quantum and Classical Photonics

Jelena Vuckovic, Stanford University

26-4: AI-Accelerated Atoms-to-Circuits Thermal Simulation Pipeline for Integrated Circuit Design

Alexander Gabourie, DeepSim, Inc.│Carlos Polanco, University of California, Davis│Connor McClellan, DeepSim, Inc.│Haotian Su, Stanford University│Mohamadali Malakoutian, Stanford University│Cagil Koroglu, Stanford University│Srabanti Chowdhury, Stanford University│Davide Donadio, University of California, Davis│Eric Pop, Stanford University

26-5: Fast Prediction of Spatio-Temporal Temperature Profiles in FinFET Arrays via Numerical and Machine-Learning Approaches

Mingeun Choi, Georgia Institute of Technology│Rinku Dutta, Georgia Institute of Technology│Priyabrata Saha, Georgia Institute of Technology│Mayur Singh, Georgia Institute of Technology│Saibal Mukhopadhyay, Georgia Institute of Technology│Suman Datta, Georgia Institute of Technology│Satish Kumar, Georgia Institute of Technology

26-6: MARS: a Multiscale Ab initio Reliability Simulator for Advanced Si and 2D Material Based MOSFETs

Yue-Yang Liu, Institute of Semiconductors, Chinese Academy of Sciences│Guang-Hua Xu, School of Microelectronics, Fudan University│Tao Xiong, Institute of Semiconductors, Chinese Academy of Sciences│Wen-Feng Li, Institute of Semiconductors, Chinese Academy of Sciences│Yu Zhao, Institute of Semiconductors, Chinese Academy of Sciences│Ting-Wei Liu, Institute of Semiconductors, Chinese Academy of Sciences│Zirui Wang, School of Integrated Circuits, Peking University│Runsheng Wang, School of Integrated Circuits, Peking University│Lin-Wang Wang, Institute of Semiconductors, Chinese Academy of Sciences│Xiangwei Jiang, Department of Mathematical and Physical Sciences, National Natural Science Foundation of China

26-7: Bias Temperature Instability Analysis of Oxide Power Transistors for BEOL On-chip Voltage Converter in Thermally-Constrained H3D Systems

Jungyoun Kwak, Georgia Institute of Technology│Jaewon Shin, Georgia Institute of Technology│Sunbin Deng, Georgia Institute of Technology│Gyujun Jeong, Georgia Institute of Technology│Janak Sharda, Georgia Institute of Technology│Suman Datta, Georgia Institute of Technology│Shimeng Yu, Georgia Institute of Technology

Session 27 Sensors, Mems, and Bioelectronics (SMB) | Novel Materials and Processes for Sensors and Detectors

2:15 PM Imperial A

Co-Chairs: Pierpaolo Palestri, University of Modena and Reggio Emilia and Eng-Huat Toh, Global Foundries

27-1: Scintillator-free Electron Detection and Counting using Single-Photon Avalanche Diodes

Tzu-Yun Huang, National Yang Ming Chiao Tung University│Chun-Hsien Liu, National Yang Ming Chiao Tung University│Meng-Hsuan Lu, National Yang Ming Chiao Tung University│Jau Yang Wu, Yuan Ze Univerisity│Sheng-Di Lin, National Yang Ming Chiao Tung University

27-2: Time Linear White Spot Reduction Technology with Multi-Step Bake

Yun-Jeong Park, Samsung Electronics│Jun-Taek Lee, Samsung Electronics│Seul-Rim Lee, Samsung Electronics│Ki-Hoon Yun, Samsung Electronics│Hyo-Sang An, Samsung Electronics│Woon-Phil Yang, Samsung Electronics

27-3: Non-Intrusive and Precise Electric Field Sensing of High-Field Electron Devices by Franz-Keldysh Effect

Jiandong Ye, Nanjing University│Xinyi Pei, Nanjing University│Hehe Gong, Virginia Tech│Na Sun, Nanjing University│Songhao Gu, Nanjing University│Fang-Fang Ren, Nanjing University│Jianhong Zhang, Nanjing University│Zezen Liu, Nanjing University│Binggege Guo, Virginia Tech│Dawei Yan, Jiangnan University│Hai Lu, Nanjing University│Shulin Gu, Nanjing University│Xinran Wang, Nanjing University│Rong Zhang, Nanjing University│Xiaoting Jia, Virginia Tech│Yuhao Zhang, Virginia Tech

27-4: Energy Material for Extreme Environment: Unveiling Novel Self-Resilience of Hf1-xZrxO2 for Electrostatic Energy Storage (EES) and Pyroelectric Energy Harvesting (PEH)

Cheng-Hong Liu, National Taiwan University│Kuo-Yu Hsiang, National Yang Ming Chiao Tung University│Fu-Sheng Chang, National Taiwan University│Yii-Tay Chang, National Taiwan University│Chee Wee Liu, National Taiwan University│Min Hung Lee, National Taiwan University

27-5: 2D PtSe2 enabled Self-powered Wireless All-in-one Transceiver-Sensor Devices

Zhehan Wang, School of Materials Science and Engineering, Southeast University│Yanling Wu, School of Materials Science and Engineering, Southeast University│Chengdong Zhao, School of Materials Science and Engineering, Southeast University│Xuyan Zhang, School of Materials Science and Engineering, Southeast University│Zhenghua Zhou, School of Materials Science and Engineering, Southeast University│Tao Xu, SEU-FEI Nano-Pico Center, Key Lab of MEMS of Ministry of Education, Southeast University│Buyun Yu, Center of Wearable RF Technology, Southeast University│Junyuan Hu, Center of Wearable RF Technology, Southeast University│Yonghao Jia, Center of Wearable RF Technology, Southeast University│Litao Sun, SEU-FEI Nano-Pico Center, Key Lab of MEMS of Ministry of Education, Southeast University│Weisheng Li, National Laboratory of Solid-State Microstructures, School of Electronic Sci. & Eng., Nanjing University│Weibing Lu, Center of Wearable RF Technology, Southeast University│Deji Akinwande, Microelectronics Research Center, UT Austin│Li Tao, School of Materials Science and Engineering, Southeast University

27-6: Achieving Over 2800% Superadditive Visual-Audio Multisensory Integration in-situ Ferroelectric-Semiconducting Transistor for Fuzzy Subject Detection

Shuo Liu, Peking University│Lixia Han, Peking University│Zhiyuan Wu, Peking University│Lei Xu, Peking University│Xinrui Guo, Peking University│Junling Liu, Peking University│Yu Zhu, Peking University│Peng Huang, Peking University│Linxiao Shen, Peking University│Ming He, Peking University│Ru Huang, Peking University

Session 28 Focus Session | Semiconductor Technology biggest and best innovations: Past to Future

2:15 PM Imperial B

Co-Chairs: Srabanti Chowdhury, Stanford University and Uygar Avci, Intel

28-1: The Incredible Shrinking Transistor - Shattering Perceived Barriers and Forging Ahead

Tahir Ghani, Intel│Pushkar Ranade, Intel

28-2: Logic Technology Device Innovations

Carlos Diaz, TSMC

28-3: The Extreme Extendibility of Cu and Post-Cu Dual Damascene BEOL Interconnect Technology

Daniel Edelstein, IBM│Son Nguyen, IBM│Huai Huang, IBM│Atharv Jog, IBM│Sam Choi, IBM│Jen Church, IBM│Somnath Ghosh, IBM│Nick Lanzillo, IBM│Michael Lofaro, IBM│Steven McDermott, IBM│Dominik Metzler, IBM│Colleen Meagher, IBM│Yann Mignot, IBM│Takeshi Nogami, IBM│Alexandru Petrescu, IBM│Matthew Shoudy, IBM│Mary Claire Sylvestre, IBM│Andrew Simon, IBM│Linda Wangoh, IBM│Haojun Zhang, IBM

28-4: DRAM Technology & Design optimization for sub-10nm and beyond

Minsoo Yoo, Hynix│Sulhwan Lee, SK hynix│Aeri Son, SK Hynix│Shingyu Choi, SK Hynix│Choongki Kim, SK Hynix│Kyoungchul Jang, SK Hynix│Kangsik Choi, SK Hynix│Yongtaik Kim, SK Hynix│Weonchul Jeon, SK Hynix│Seonsoon Kim, SK Hynix│Youngman Cho, SK Hynix│Choonhwan Kim, SK Hynix│Ilsup Jin, SK Hynix│Seonyong Cha, SK Hynix│Jonghwan Kim, SK Hynix

28-5: NAND Flash Innovations and Future Scaling

Akira Goda, Micron

28-6: Major Consumer Image Sensor Innovations Presented at IEDM

Albert Theuwissen, Harvest Imaging

Session 30 Memory Technology (MT) | Ferroelectric FET and NAND Flash Memories

9:00 AM Grand Ballroom A

Co-Chairs: Wanki Kim, Samsung and Maarten Rosmeulen, IMEC

30-1: Superior Scalability of Advanced Horizontal Channel Flash For Future Generations of 3D Flash Memory

Minoru Oda, Kioxia Corporation│Kosuke Sakamawari, Kioxia Corporation│Shunichi Seno, Kioxia Corporation│Yuki Nakata, Kioxia Corporation│Ryo Fukuoka, Kioxia Corporation│Haruka Kusai, Kioxia Corporation│Keiji Hosotani, Kioxia Corporation│Toru Nakanishi, Kioxia Corporation│Daisuke Hagishima, Kioxia Corporation│Toshiya Ishikawa, Kioxia Corporation│Tatsuo Ogura, Kioxia Corporation│Shinya Naito, Kioxia Corporation│Takashi Kurusu, Kioxia Corporation│Sumiko Mano, Kioxia Corporation│Tsuyoshi Ogikubo, Kioxia Corporation│Motohiko Fujimatsu, Kioxia Corporation│Kikuko Sugimae, Kioxia Corporation│Mina Hatakeyama, Kioxia Corporation│Yuki Inuzuka, Kioxia Corporation│Yusuke Niki, Kioxia Corporation│Rieko Tanaka, Kioxia Corporation│Noboru Shibata, Kioxia Corporation│Hiroshi Nakamura, Kioxia Corporation│Makoto Fujiwara, Kioxia Corporation│Koji Matsuo, Kioxia Corporation│Yoshiro Shimojo, Kioxia Corporation│Fumitaka Arai, Kioxia Corporation│Masaki Kondo, Kioxia Corporation│Tomohiro Oki, Kioxia Corporation│Masaru Kito, Kioxia Corporation

30-2: Gate-stack Optimization to Mitigate the Cylindrical Effect in Ferroelectric VNAND

Kwangsoo Kim, Samsung Electronics│Suhwan Lim, Samsung electronics│Jongho Woo, Samsung electronics│Junyeong Lim, Samsung electronics│Sijung Yoo, Samsung Advanced Institute of Technology│Hyoseok Kim, Samsung electronics│Jaewoo Park, Samsung electronics│Haeyeon Jun, Samsung electronics│Seunghyun Kim, Samsung electronics│Myunghun Woo, Samsung electronics│Taeyoung Kim, Samsung electronics│Sanghyun Park, Samsung electronics│Hanseung Ko, Samsung electronics│Youngji Noh, Samsung electronics│Moonkang Choi, Samsung electronics│Jongyeon Baek, Samsung electronics│Jisung Kim, Samsung electronics│Kiheun Lee, Samsung electronics│Sam Park, Samsung electronics│Dukhyun Choe, Samsung Advanced Institute of Technology│Moonyoung Jung, Samsung electronics│Gukhyon Yon, Samsung electronics│Suhyeong Lee, Samsung electronics│Hyung Joon Kim, Samsung electronics│Kijoon Kim, Samsung electronics│Sungduk Hong, Samsung electronics│Kwangmin Park, Samsung electronics│Bong Jin kuh, Samsung electronics│Wanki Kim, Samsung electronics│Daewon Ha, Samsung electronics│Sujin Ahn, Samsung electronics│Jaihyuk Song, Samsung electronics

30-3: Clarifying the Role of Ferroelectric in Expanding the Memory Window of Ferroelectric FETs with Gate-Side Injection: Isolating Contributions from Polarization and Charge Trapping

Yixin Qin, University of Notre Dame│Saikat Chakraborty, University of Texas, Austin│Zijian Zhao, University of Notre Dame│Kijoon Kim, Samsung Electronics Co., Ltd│Suhwan Lim, Samsung Electronics Co., Ltd│Jongho Woo, Samsung Electronics Co., Ltd│Kwangsoo Kim, Samsung Electronics Co., Ltd│Wanki Kim, Samsung Electronics Co., Ltd│Daewon Ha, Samsung Electronics Co., Ltd│Xiao Gong, National University of Singapore│Asif Khan, Georgia Institute of Technology│Vijaykrishnan Narayanan, Pennsylvania State University│Jaydeep Kulkarni, University of Texas, Austin│Kai Ni, University of Notre Dame

30-4: Oxide Channel Ferroelectric NAND Device with Source- tied Covering Metal Structure: Wide Memory Window (14.3 V), Reliable Retention (> 10 years) and Disturbance Immunity (△Vth ≤ 0.1 V) for QLC Operation

Hongrae Joh, KAIST│Giuk Kim, KAIST│Jihye Ock, KAIST│Seungyeob Kim, KAIST│Sangmok Lee, KAIST│Sangho Lee, KAIST│Kwangsoo Kim, Samsung Electronics│Suhwan Lim, Samsung Electronics│Jongho Woo, Samsung Electronics│Wanki Kim, Samsung Electronics│Daewon Ha, Samsung Electronics│Jinho Ahn, Hanyang University│Sanghun Jeon, KAIST

30-5: Novel Design Strategy for High-Endurance (>1010) and Fast-Erase Oxide-Semiconductor Channel FeFET

Zhuo Chen, IMEC│Hyun-Cheol Kim, IMEC│Wei Zheng, IMEC│Roman Izmailov, IMEC│Brecht Truijen, IMEC│Subhali Subhechha, IMEC│Amey Walke, IMEC│Adrian Chasin, IMEC│Mihaela Popovici, IMEC│Jie Li, IMEC│Anastasiia Kruv, IMEC│Hongwei Tang, IMEC│Fengben Xi, IMEC│Geert Van den bosch, IMEC│Maarten Rosmeulen, IMEC│Nicolò Ronchi, IMEC│Valeri Afanas’ev, IMEC│Jan Van Houdt, IMEC

30-6: Demonstration of Ferroelectric FET Memory with Oxide Semiconductor Channel to Achieve Smallest Cell Area 0.009 µm2 and High Endurance for Non-Volatile High-Bandwidth Memory Applications

Yu-Ming Lin, R&D, Taiwan Semiconductor Manufacturing Company│Chun-Chieh Lu, R&D, Taiwan Semiconductor Manufacturing Company│Yu-Chuan Shih, R&D, Taiwan Semiconductor Manufacturing Company│Chih-Yu Chang, R&D, Taiwan Semiconductor Manufacturing Company│Yu-Kai Chang, R&D, Taiwan Semiconductor Manufacturing Company│Yu-Chien Chiu, R&D, Taiwan Semiconductor Manufacturing Company│Wen-Ling Lu, R&D, Taiwan Semiconductor Manufacturing Company│Chih-Hung Nien, R&D, Taiwan Semiconductor Manufacturing Company│Yu-Ming Hsiang, R&D, Taiwan Semiconductor Manufacturing Company│Ya-Yun Cheng, R&D, Taiwan Semiconductor Manufacturing Company│Yi-Ching Liu, R&D, Taiwan Semiconductor Manufacturing Company│Huai-Ying Huang, R&D, Taiwan Semiconductor Manufacturing Company│Pei-Jean Liao, R&D, Taiwan Semiconductor Manufacturing Company│Vincent Duen-Huei Hou, R&D, Taiwan Semiconductor Manufacturing Company│Gerben Doornbos, R&D, Taiwan Semiconductor Manufacturing Company│Georgios Vellianitis, R&D, Taiwan Semiconductor Manufacturing Company│Mark van Dal, R&D, Taiwan Semiconductor Manufacturing Company│Jeff Wu, R&D, Taiwan Semiconductor Manufacturing Company

Session 31 Advanced Logic Technology (ALT) | 3D-integrated Circuit Technology

9:00 AM Grand Ballroom B

Co-Chairs: Bich-Yen Nguyen, SOITEC and Liesbeth Witters, IMEC

31-1: Power and Thermal Integrity Analysis of High Performance and Low Power CPUs at Sub-2nm Node Designed with Various Advanced Backside PDNs

Linqiu Wang, Peking University│Feifan Xie, Purdue│Jizhe Liu, Peking University│Tianchi Liu, Peking University│Lianmao Peng, Peking University│Zhiyong Zhang, Peking University│Tiwei Wei, Purdue University│Rongmei Chen, Peking University

31-2: Vertically Integrated Active Power Delivery Network (PDN) for Heterogenous 3D (H3D) Stacked Systems: 3D On-chip Integration of GaN Power Devices on PDN with Direct Heat Spreading Layer Bonding

Jaeyong Jeong, KAIST│Chan Jik Lee, KAIST│Sung Joon Choi, KAIST│Nahyun Rheem, KAIST│Minseo Song, KAIST│Yoon-Je Suh, KAIST│Bong Ho Kim, KAIST│Joon Pyo Kim, KAIST│Joonsup Shim, KAIST│Jiseon Lee, KANC│Myungsoo Park, KANC│Yumin Koh, KANC│Donghyun Kim, KANC│Sanghyeon Kim, KAIST

31-3: System technology co-optimization of cost-bandwidth tradeoffs in Network on Chip through 3D integration and backside signals

Moritz Brunion, imec│Arvind Sharma, imec│Gioele Mirabelli, imec│Dawit Abdi, imec│Yun Zhou, imec│Halil Kükner, imec│Odysseas Zografos, imec│Fernando Redondo, imec UK│Dwaipayan Biswas, imec│Geert Hellings, imec│Julien Ryckaert, imec│James Myers, imec UK

31-4: Hyper RDL (HRDL) Interposer by Layer Transfer Technology for 3D IC and Advanced Packaging

Yu-Lun Liu, National Yang Ming Chiao Tung University│Chien-Kang Hsiung, National Yang Ming Chiao Tung University│Chun-Ta Li, National Yang Ming Chiao Tung University│Tzu-Han Sun, National Yang Ming Chiao Tung University│Yu-Tao Yang, MediaTek USA Inc.│Wen-Tzu Tsai, National Yang Ming Chiao Tung University│Mu-Ping Hsu, National Yang Ming Chiao Tung University│Kuan-Neng Chen, National Yang Ming Chiao Tung University

31-5: Selective Layer Transfer: Industry First Heterogeneous Integration Technology Enabling Ultra-Fast Assembly & Sub-1um Chiplet Thickness for Next Generation AI & Compute Applications

Adel Elsherbini, Intel Corporation

31-6: Precise Alignment in Ultra-Thin (<1 µm) Interlayer Wafer-Level Active Device Transfer with SOI Temporary Bonding

Bo-Jheng Shih, National Yang Ming Chiao Tung University│Shie-Ping Chang, National Yang Ming Chiao Tung University│Ting-Yu Chen, National Yang Ming Chiao Tung University│Zih-Yang Chen, National Yang Ming Chiao Tung University│Po-Jung Sung, Taiwan Semiconductor Research Institute│Nein-Chih Lin, Taiwan Semiconductor Research Institute│Chih-Chao Yang, Taiwan Semiconductor Research Institute│Po-Tsang Huang, National Yang Ming Chiao Tung University│Huang-Chung Cheng, National Yang Ming Chiao Tung University│Ming-Yang Li, Taiwan Semiconductor Manufacturing Company│Iuliana P. Radu, Taiwan Semiconductor Manufacturing Company│Kuan-Neng Chen, National Yang Ming Chiao Tung University

31-7: Novel Parallel Digital Optical Computing System (DOC) for Generative A.I.

Chun-Hao Fann, TSMC│Wei-Heng Lin, TSMC│Nien Fang Wu, TSMC│Jiun Yi Wu, TSMC│Harry Hsia, TSMC│Douglas C. H. Yu, TSMC

31-8: EPIC-BOE: An Electronic-Photonic Chiplet Integration Technology with IC Processes for Broadband Optical Engine Applications

Harry Hsia, TSMC│J. Y. Wu, TSMC│S. W. Liang, TSMC│T. F. Tsai, TSMC│S. W. Lu, TSMC│C. W. Tseng, TSMC│H. K. Chiu, TSMC│C. C. Chang, TSMC│C. H. Tung, TSMC│C. S. Liu, TSMC│K. C. Yee, TSMC│Douglas C. H. Yu, TSMC

Session 32 Modeling and Simulation (MS) | Modeling of Advanced Channel Materials: 2D, IGZO and GaN

9:00 AM Continental 1-3

Co-Chairs: Devin Verreck, IMEC and Benoît Sklénard, CEA-Leti

32-1: Nanoscale Device Modeling beyond the Ballistic Limit of Transport and Fixed Geometries

Mathieu Luisier, ETH Zurich│Jonathan Backman, ETH Zurich│Jiang Cao, ETH Zurich│Leonard Deuschle, ETH Zurich│Manasa Kaniselvan, ETH Zurich│Youseung Lee, ETH Zurich│Alexander Maeder, ETH Zurich│Vincent Maillou, ETH Zurich│Marko Mladenovic, ETH Zurich│Nicolas Vetsch, ETH Zurich│Anders Winka, ETH Zurich│Xia Chen Hao, ETH Zurich│Alexandros Ziogas, ETH Zurich

32-2: Analysis and Implication of Electrothermal Effects in Emerging 3D Transistors and Integration Topologies with Two-dimensional Semiconductors

Lin Xu, ECE Department, University of California, Santa Barbara, CA│Ankit Kumar, ECE Department, University of California, Santa Barbara, CA│Emmanuel Quezada, ECE Department, University of California, Santa Barbara, CA│Jianfeng Jiang, EECS, Massachusetts Institute of Technology, Cambridge, MA│Guenhyung Oh, ECE Department, University of California, Santa Barbara, CA│Kunjesh Agashiwala, ECE Department, University of California, Santa Barbara, CA│Junkai Jiang, ECE Department, University of California, Santa Barbara, CA│Arnab Pal, ECE Department, University of California, Santa Barbara, CA│Wei Cao, ECE Department, University of California, Santa Barbara, CA│Minseong Lee, ECE Department, University of California, Santa Barbara, CA│Kaustav Banerjee, ECE Department, University of California, Santa Barbara, CA

32-3: Correlation of TMD Defects with Device Performance in Ultra-Scaled Channels: Theoretical Insights and Experimental Observations

Lida Ansari, Tyndall National Institute, University College Cork│Andrey Vyatskikh, Intel Foundry Technology Research│Chelsey Dorow, Intel Foundry Technology Research│Saurabh Kharwar, Tyndall National Institute, University College Cork│Sharieh Jamalzadeh, Tyndall National Institute, University College Cork│Pau Hurley, Tyndall National Institute, University College Cork│Luca Camilli, Tor Vergata University of Rome│Manuela Scarselli, Tor Vergata University of Rome│Matthew Shaw, Intel Foundry Technology Research│Lutfe Siddiqui, TCAD, Intel│Ashish Penumatcha, Intel Foundry Technology Research│Kevin O’Brien, Intel Foundry Technology Research│Carly Rogan, Intel Foundry Technology Research│Scott Clendenning, Intel Foundry Technology Research│Jessica Torres, Intel Foundry Technology Research│Uygar Avci, Intel Foundry Technology Research│Farzan Gity, Tyndall National Institute, University College Cork

32-4: Sub-60mV/dec Swing and Drive Current in Dirac-Source FETs: a Design Study based on First-Principle Transport Simulations

Duy Nguyen, DPIA, University of Udine│Alessandro Pilotto, DPIA, University of Udine│Daniel Lizzit, DPIA, University of Udine│Marco Pala, DPIA, University of Udine│David Esseni, DPIA, University of Udine

32-5: Transport Properties of Crystalline IGZO Channel Devices: Effects of Cation Disorders, Composition and Dimensions

Deokhwa Seo, Korea Advanced Institute of Science and Technology│Seunghyo Han, Korea Advanced Institute of Science and Technology│Jun-Hwe Cha, SK hynix Inc.│Seiyon Kim, SK hynix Inc.│Mincheol Shin, Korea Advanced Institute of Science and Technology

32-6: Deep Insights into Interlayer in TiN/IGZO Contact and Its Impact on Contact Resistance of CAA FETs: First-Principles Calculation, Experimental Study and Modeling

Yue Zhao, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Lijun Xu, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Chuanke Chen, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Chunyu Zhang, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Ziheng Bai, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Lihua Xu, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Xufan Li, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Kexin Shang, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Kun Luo, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Jiangtao Liu, Guizhou Minzu University, Guiyang, China│Qinzhi Xu, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Zhenhua Wu, Zhejiang University, Hangzhou, China│Lingfei Wang, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Ling Li, Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China│Ling Liu, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China

32-7: Performance Optimization of GaN based Optically Triggered Transistors

Rafid Hassan Palash, Dept. of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka-1205, Bangladesh│Toiyob Hossain, Dept. of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka-1205, Bangladesh│Bejoy Sikder, Dept. of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka-1205, Bangladesh│Qingyun Xie, Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02139, U.S.A.│Victor Moroz, Synopsys, Inc., Mountain View, CA, U.S.A.│Tomás Palacios, Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02139, U.S.A.│Nadim Chowdhury, Dept. of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka-1205, Bangladesh

Session 33 Focus Session | Emerging Power Electronic Devices and Integration for a Sustainable Society

9:00 AM Continental 4

Co-Chairs: Michael Waltl, TU Wien and Kevin CHEN, The Hong Kong University of Science and Technology

33-1: Substrate Innovation enabling advanced device technologies

Christophe. Maleville, SOITEC

33-2: Propelling Widespread GaN Electronics Adoption With Large Diameter and CMOS Fab Friendly GaN-on-QST® Manufacturing Platform

Vladimir Odnoblyudov, QROMIS, Inc.│Cem Basceri, QROMIS, Inc.│Casey Kurth, QROMIS, Inc.│Masa Yamada, Shin-Etsu Chemical Co.│Shigeru Konishi, Shin-Etsu Chemical Co.│Minoru Kawahara, Shin-Etsu Chemical Co.│C.-C. Liao, Vanguard International Semiconductor Corp.│Shyh Shen, Vanguard International Semiconductor Corp.│Jeff Chiu, Vanguard International Semiconductor Corp.│Karen Geens, IMEC│Anurag Vohra, IMEC│Benoit Bakeroot, IMEC│Stefaan Decoutere, IMEC│Herwig Hahn, AIXTRON SE│Michael Heuken, AIXTRON SE

33-3: The Future of GaN is also High Voltage, High Current and Bidirectional

Umesh Mishra, University of California, Santa Barbara│Davide Bisi, Renesas Electronics│Geetak Gupta, Renesas Electronics│Carl Neufeld, Renesas Electronics│Primit Parikh, Renesas Electronics

33-4: Performance and reliability improvement trends in silicon carbide power devices

Hiroshi Kono, Toshiba Electronic Devices & Storage Corporation│Ryoichi Ohara, Toshiba Electronic Devices & Storage Corporation│Takuma Suzuki, Toshiba Electronic Devices & Storage Corporation│Shunsuke Asaba, Toshiba Electronic Devices & Storage Corporation│Kenya Sano, oshiba Electronic Devices & Storage Corporation

33-5: Combo ICeGaN: The combination of a smart GaN HEMT and an IGBT

Florin Udrea, University of Cambridge

33-6: Enhancing 1.2 kV 4H-SiC MOSFET Performance and Ruggedness through Deep P-Well Technology

Woongje Sung, University at Albany│Dongyoung Kim, University at Albany│Skylar deBoer, University at Albany│Justin Lynch, University at Albany│Seung Yup Jang, NoMIS Power Corporation│Adam Morgan, NoMIS Power Corporation

33-7: Vertical GaN Devices: Reliability Challenges and Lessons Learned from Si and SiC

Matteo Meneghini, Univ. of Padova│Manuel Fregolent, Univ. of Padova│Nicolò Zagni, University of Modena and Reggio Emilia│Youssef Hamadoui, IEMN-CNRS│Alberto Marcuzzi, Univ. of Padova│Davide Favero, Univ. of Padova│Carlo De Santi, Univ. of Padova│Matteo Buffolo, Univ. of Padova│Marco Tomasi, Univ. of Padova│Giorgio Zappalà, Univ. of Padova│Eldad Bahat-Treidel, Ferdinand Braun Institut (Berlin, Germany)│Enrico Brusaterra, Ferdinand Braun Institut (Berlin, Germany)│Frank Brunner, Ferdinand Braun Institut (Berlin, Germany)│Oliver Hilt, Ferdinand Braun Institut (Berlin, Germany)│Christian Huber, Robert Bosch GmbH (Renningen, Germany)│Farid Medjdoub, IEMN-CNRS│Gaudenzio Meneghesso, Univ. of Padova│Giovanni Verzellesi, University of Modena and Reggio Emilia│Paolo Pavan, University of Modena and Reggio Emilia│Enrico Zanoni, Univ. of Padova

33-8: Closing the Gap Between State-of-the-Art and Space Grade Power Semiconductor Devices

Eric Faraci, Infineon Technologies

Session 34 Reliability Of Systems and Devices (RSD) | Transistor Reliability with Novel Processes, Materials and Evaluation Methodologies

9:00 AM Continental 5

Co-Chairs: Bonnie Weir, Broadcom and Huimei Zhou, IBM

34-1: Low Thermal Budget Multi-Vth RMG solution with excellent TDDB and BTI Reliability by combining hydrogen radical IL treatment, n-dipole-first shifter and low-temperature HK PDA

Jacopo Franco, imec│Hiroaki Arimura, imec│Andrea Vici, imec│Jean-Francois de Marneffe, imec│Giorgio Molinaro, imec│Jishnu Ganguly, imec│Leo Lukose, imec│Robin Degraeve, imec│Ben Kaczer, imec│Hans Mertens, imec│Min-Soo Kim, imec│Naoto Horiguchi, imec

34-2: Unraveling BTI in IGZO devices: impact of device architecture, channel film deposition method and stoichiometry/phase, and device operating conditions

Adrian Chasin, imec│Jacopo Franco, imec│Simon Van Beek, imec│Harold Dekkers, imec│Anastasiia Kruv, imec│Pietro Rinaudo, imec│Ying Zhao, imec│Daisuke Matsubayashi, imec│Alexandru Pavel, imec│Yiqun Wan, imec│Kruti Trivedi, imec│Nouredine Rassoul, imec│Jie Li, imec│Yuchao Jiang, imec│Michiel Van Setten, imec│Subhali Subhechha, imec│Attilio Belmonte, imec│Ben Kaczer, imec│Gouri Kar, imec

34-3: Revealing the Impact of Hydrogen (H) on NBTI/PBTI of IGZTO FETs Under DC and AC Stress: Deep Dive into H Dynamics and Advanced Modeling

Gan Liu, National University of Singapore│Zhilun Zhang, National University of Singapore│Duy Hieu Trinh, National University of Singapore│Hanjie Li, National University of Singapore│Qiwen Kong, National University of Singapore│Chen Sun, National University of Singapore│Zuopu Zhou, National University of Singapore│Dong Zhang, National University of Singapore│Xiaolin Wang, National University of Singapore│Kaizhen Han, National University of Singapore│Yuye Kang, National University of Singapore│Bich-Yen Nguyen, Soitec│Kai Ni, University of Notre Dame│Gengchiau Liang, National University of Singapore│Xiao Gong, National University of Singapore

34-4: A Status Overview of SiC MOSFET Reliability

Peter Moens, onsemi│Sotirios Maslougkas, onsemi│Marina Avramenko, onsemi│German Gomez-Garcia, onsemi│Sara Kuzmanoska, onsemi│martin domeij, onsemi

34-5: Towards Understanding the Dynamic Variation in FinFET at Cryogenic Temperature: New Observations and Physical Modeling

Zirui Wang, Peking University│Haoran Wang, Beihang University│Wen-Feng Li, Institute of Semiconductors, Chinese Academy of Sciences│Yuxiao Wang, Beihang University│Zixuan Sun, Peking University│Anyi Zhu, Peking University│Lang Zeng, Beihang University│Yue-Yang Liu, Institute of Semiconductors, Chinese Academy of Sciences│Runsheng Wang, Peking University│Ru huang, Peking University

34-6: Boosted Performance and Enhanced Reliability of BEOL-Compatible Dual-Gate Oxide Power Transistors for On-Chip DC-DC Voltage Conversion

Sunbin Deng, Georgia Institute of Technology│Jaewon Shin, Georgia Institute of Technology│Chengyang Zhang, Georgia Institute of Technology│Hyeonwoo Park, Georgia Institute of Technology│Omkar Phadke, Georgia Institute of Technology│Jungyoun Kwak, Georgia Institute of Technology│Shimeng Yu, Georgia Institute of Technology│Suman Datta, Georgia Institute of Technology

34-7: Fine characterization and Modeling of the Frequency Dependence of TDDB in RF domain (F>10GHz)

Alexis Divay, CEA-LETI│Tarek Daher, CEA-LETI│Léo Basset, CEA-LETI│Serge Blonkowski, CEA-LETI│Xavier Federspiel, ST Microelectronics│David Roy, ST Microelectronics│Fred Gaillard, CEA-LETI│Blandine Duriez, CEA-LETI│Xavier Garros, CEA-LETI

34-8: Design Strategy for Mitigating Off-state Current Degradation in Non-Conductive Stress (NCS) Reliability

P.J. Liao, TSMC│Y.K. Chang, TSMC│C.M. Fu, TSMC│C.T. Ou, TSMC│C.M. Lin, TSMC│K.Y. Chia, TSMC│J.H. Lee, TSMC│W.H. Chuang, TSMC│Ryan Lu, TSMC│Jun He, TSMC

Session 35 Sensors, Mems, and Bioelectronics (SMB) | Biosensors and wearables

9:00 AM Continental 6

Co-Chairs: Man Wong, Hong Kong University of Science and Technology and Cunjiang Yu, UIUC

35-1: Dual-gate IGZO FET Sensor Array for Multi-biomarker Detection Achieving Ultra High Sensitivity with 4.426%/decade of ssDNA and 1102nA/decade of Protein CA125

Yao Li, Institute of Microelectronics, Chinese Academy of Sciences│yuying zhou, Institute of Microelectronics, Chinese Academy of Sciences│Bing Chen, Department of Gastroenterology, The First Affiliated Hospital of Zhengzhou University│Shuaidi Zhang, Institute of Microelectronics, Chinese Academy of Sciences│Ke Hu, Institute of Microelectronics, Chinese Academy of Sciences│Peiyun Li, Institute of Microelectronics, Chinese Academy of Sciences│Congyan Lu, Institute of Microelectronics, Chinese Academy of Sciences│Wenchang Zhang, Institute of Microelectronics, Chinese Academy of Sciences│Xiaonan Yang, School of Information Engineering, Zhengzhou University│Feng Zhang, Institute of Microelectronics, Chinese Academy of Sciences│Jiawei Wang, Institute of Microelectronics, Chinese Academy of Sciences│Ling Li, Institute of Microelectronics, Chinese Academy of Sciences

35-2: An Implantable, 1024-Channel Multiplexed Electrode Array for High-Density Brain Activity Mapping

Xing Sheng, Tsinghua University│Yang Xie, Tsinghua University

35-3: Large-area 64×64 Ion-Sensitive Thin-Film Transistor Bio-chip for Real-time Detection of Multiple Pathogenic Bacteria DNAs

Wei Tang, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Jun Li, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Haiyang Yu, Shanghai Veterinary Research Institute, Chinese Academy of Agricultural Sciences, Shanghai, China│Fucheng Wang, Shanghai Veterinary Research Institute, Chinese Academy of Agricultural Sciences, Shanghai, China│Zhonghao Shi, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Yu Huang, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Ziheng Wang, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Mengwei Si, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China│Wei Jiang, Shanghai Veterinary Research Institute, Chinese Academy of Agricultural Sciences, Shanghai, China│Xiaojun Guo, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China

35-4: Advanced MEMS-Based Wearable Devices for Cardiopulmonary Applications

Farrokh Ayazi, Georgia Tech│Xinyu Jiang, Georgia Tech│Brian Sang, Georgia Tech

35-6: High Performance 3D ITZO DGTFTs and Their Application in Wearable Pulse Sensors

Delang Lin, School of Microelectronics, South China University of Technology│Rongsheng Chen, School of Microelectronics, South China University of Technology│Man Chun Tseng, State Key Laboratory of Advanced Displays and Optoelectronics Technologies, Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology│Fion Sze Yan Yeung, State Key Laboratory of Advanced Displays and Optoelectronics Technologies, Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology│Hoi Sing Kwok, State Key Laboratory of Advanced Displays and Optoelectronics Technologies, Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology

35-7: Flexible Active-Matrix Tactile Sensor Arrays with High Density of 4096 pixels/cm2 and In-Array Sensitivity of 51 kPa-1

Zhu, Westlake University│Yingjie Tang, Westlake University│Lang Wang, Westlake University│Siyu Zhang, Westlake University│Hui Zhang, Westlake University│Yan Wang, Westlake University│Yitong Chen, Westlake University│Fanfan Li, Westlake University│Dingwei Li, Westlake University│Huihui Ren, Westlake University│Guolei Liu, Westlake University│Qi Huang, Westlake University│Hua Xu, Guangzhou New Vision Optoelectronic Technology Co., Ltd.│Liaoyong Wen, Westlake University

Session 36 Emerging Device and Compute Technology (EDT) | BEOL-compatible Oxide Channel Devices

9:00 AM Continental 7-9

Co-Chairs: Tania Roy, Duke University and Veeresh Deshpande, IIT Bombay

36-1: Enhancement-mode Atomic Layer Deposited W-doped In2O3 Transistor at 55 nm Channel Length by Oxide Capping Layer with Improved Stability

Qing Lin, TSMC│Nathaniel Safron, TSMC│Donglai Zhong, TSMC│Goutham Arutchelvan, TSMC│Carlo Gilardi, TSMC│Chanyoung Yoo, Stanford University│Jonathan Hartanto, Stanford University│Balreen Saini, Stanford University│Sheng-Chih Lai, TSMC│Gregory Pitner, TSMC│Gary Chen, TSMC│Marvin Chang, TSMC│Yu-ming Lin, TSMC│Wilman Tsai, Stanford University│Paul McIntyre, Stanford University│Iuliana Radu, TSMC

36-2: First Demonstration of Double-Gate IGZO Transistors with Ideal Subthreshold Swing of 60 mV/dec at Room Temperature and 76 mV/dec at 380 K over 5 Decades and gm Exceeding 1 mS/µm with Contact Length Scaling

Wenjie Zhao, Peking University│Shenwu Zhu, Peking University│Qijun Li, Huazhong University of Science and Technology│Qianlan Hu, Peking University│Honggang Liu, Huazhong University of Science and Technology│Anyu Tong, Peking University│Min Zeng, Huazhong University of Science and Technology│Ru Huang, Peking University│Yanqing Wu, Peking University

36-3: Amorphous Indium Oxide Channel FeFETs with Write Voltage of 0.9V and Endurance >10^12 for Refresh-free 1T-1FeFET embedded Memory

Sharadindu Gopal Kirtania, Georgia Institute of Technology│Omkar Phadke, Georgia Institute of Technology│Eknath Sarker, Georgia Institute of Technology│Khandker Akif Aabrar, Georgia Institute of Technology│Dyutimoy Chakraborty, Georgia Institute of Technology│Faaiq Waqar, Georgia Institute of Technology│Shin Jaewon, Georgia Institute of Technology│Tanvir Pantha, University of Texas Dallas│Sourav Datta, University of Texas Dallas│Asif Khan, Georgia Institute of Technology│Shimeng Yu, Georgia Institute of Technology│Suman Datta, Georgia Institute of Technology

36-4: Highly-Scaled BEOL E-mode Transistor and Discrete-Domain Ferroelectric Memory Platform Enabled by PEALD In2O3

Yanjie Shao, Massachusetts Institute of Technology│John Huang, Massachusetts Institute of Technology│Elham Rafie Borujeny, Massachusetts Institute of Technology│Tyra Espedal, Massachusetts Institute of Technology│Dimitri Antoniadis, Massachusetts Institute of Technology│Jesús del Alamo, Massachusetts Institute of Technology

36-5: BEOL-compatible Non-Volatile Capacitive Synapse with ALD W-doped In2O3 Semiconductor Layer

Junmo Lee, Georgia Institute of Technology│Chengyang Zhang, Georgia Institute of Technology│Minji Shon, Georgia Institute of Technology│James Read, Georgia Institute of Technology│Sunbin Deng, Georgia Institute of Technology│Omkar Phadke, Georgia Institute of Technology│Prasanna Venkatesan Ravindran, Georgia Institute of Technology│Mengkun Tian, Georgia Institute of Technology│Yuan-Chun Luo, Georgia Institute of Technology│Tae-Hyeon Kim, Georgia Institute of Technology│Asif Khan, Georgia Institute of Technology│Suman Datta, Georgia Institute of Technology│Shimeng Yu, Georgia Institute of Technology

36-6: 1T1R and 2T0C1R IGZO-MoS2 All-BEOL 3D Memory Cells

Baoshan Tang, National University of Singapore│Zihang Fang, National University of Singapore│Ruyue Wan, National University of Singapore│Sonu Hooda, National University of Singapore│JINFENG LEONG, National University of Singapore│Quanzhen Wan, National University of Singapore│Chun-Kuei Chen, National University of Singapore│Evgeny Zamburg, National University of Singapore│Joong-sik Kim, National University of Singapore│Aaron Thean, National University of Singapore

Session 37 Memory Technology (MT) | Materials and Process Advances for Ferroelectric Memory Applications

1:30 PM Grand Ballroom A

Co-Chairs: Yu-Ming Lin, TSMC and Nanbo Gong, IBM

37-1: Record Endurance (> 1012 cycles), High Polarization (2Pr > 50 µC/cm2), and 10-year Data Retention (85 oC) in HZO Capacitors with Well-Ordered Ferroelectric Domain Structures via 2D-WS2 Interface

Seungkwon Hwang, Pohang University of Science and Technology (POSTECH)│Hojung Jang, Pohang University of Science and Technology (POSTECH)│Kyumin Lee, Pohang University of Science and Technology (POSTECH)│Laeyong Jung, Pohang University of Science and Technology (POSTECH)│Jongwon Yoon, Korea Institute of Materials Science (KIMS)│Jung-Dae Kwon, Korea Institute of Materials Science (KIMS)│Kyung Song, Korea Institute of Materials Science (KIMS)│Yonghun Kim, Korea Institute of Materials Science (KIMS)│Hyunsang Hwang, Pohang University of Science and Technology (POSTECH)

37-2: Design Methodology for Low-Voltage Operational (≤1 V) FRAM Cell Capacitors and Approaches for Overcoming Disturb Issues in 1T-nC Arrays: Experimental & Modeling

Sangho Lee, KAIST│Giuk Kim, KAIST│Chaeheon Kim, KAIST│Yunseok Nam, KAIST│Junghyeon Hwang, KAIST│Yangjin Jung, KAIST│Mincheol Shin, KAIST│Youngin Goh, Samsung Electronics│Mintae Ryu, Samsung Electronics│Jihye Suh, Samsung Electronics│Kilho Lee, Samsung Electronics│Wanki Kim, Samsung Electronics│Daewon Ha, Samsung Electronics│Jinho Ahn, Hanyang University│Sanghun Jeon, KAIST

37-3: Comprehensive Performance Re-assessment of Hafnia-based Cross-point FeRAM with Ultra-fast and Low-power Operation from Device/Array Perspective

Shengjie Cao, School of Integrated Circuits, Peking University│Zhiyuan Fu, School of Integrated Circuits, Peking University│Minyue Deng, School of Integrated Circuits, Peking University│Hao Zheng, School of Integrated Circuits, Peking University│Qianqian Huang, School of Integrated Circuits, Peking University│Ru Huang, School of Integrated Circuits, Peking University

37-4: 3D trench Hf0.5Zr0.5O2-based 32 Kbit 1T1C FeRAM Chip with 2/5 ns Write/Read speed, Low power consumption (0.605 pJ/bit) and Prominent High-temperature Reliability (baking @ 175℃)

Jiajie Yu, Fudan University│Shuming Guo, China Resources Microelectronics Limited│Jinna Zhang, Fudan University│Xingcheng Jin, China Resources Microelectronics Limited│Chao Wu, Fudan University│Minghao Zhao, China Resources Microelectronics Limited│Hongbo Li, China Resources Microelectronics Limited│Chongyong Guo, China Resources Microelectronics Limited│Kangli Xu, Fudan University│Yuxin Tian, Fudan University│Dong Tian, Fudan University│Zhenhai Li, Fudan University│Tianyu Wang, National Integrated Circuit Innovation Center│Hao Zhu, Fudan University│Qingqing Sun, Fudan University│Yufeng Xie, Fudan University│Hao Wang, China Resources Microelectronics Limited│David Wei Zhang, Fudan University│Lin Chen, Fudan University

37-5: Improved Capacitive Memory Window for Non-destructive Read in HZO-based Ferroelectric Capacitors with Incorporation of Semiconducting IGZO

Shankha Mukherjee, imec│Jasper Bizindavyi, imec│Sergiu Clima, imec│Yang Xiang, imec│Mihaela Popovici, imec│Attilio Belmonte, imec│Roman Izmailov, imec│Jimmy Stiers, imec│Anastasiia Kruv, imec│Subhali Subhechha, imec│Harold Dekkers, imec│GouriSankar Kar, imec│Gourab De, imec│Nicolo Ronchi, imec│Zied Belkhiri, imec│Geert Van den Bosch, imec│Maarten Rosmeulen, imec│Francky Catthoor, imec│Shimeng Yu, Georgia Institute of Technology│Valeri Afanas’ev, KU Leuven│Jan Van Houdt, imec

37-6: Novel High Density 3D Buffer Memory Enabled by IGZO Channel Charge Coupled Device

Rishabh Kishore, imec│Swaraj Bandhu Mahato, imec│Subhali Subhechha, imec│Jiwon Lee, imec│Ruben Bonne, imec│Yiqun Wan, imec│Nouredine Rassoul, imec│Sana Rachidi, imec│Jie Li, imec│Yuchao Jiang, imec│Bowen Wang, imec│Attilio Belmonte, imec│Gouri Kar, imec│Maarten Rosmeulen, imec

Session 38 Neuromorphic Computing (NC) | Ferroelectrics and Beyond

1:30 PM Grand Ballroom B

Co-Chairs: Thomas Kämpfe, Fraunhofer IPMS and Catherine Graves, Google DeepMind

38-1: Analog Computation in Ultra-High Density 3D FeNAND for TB-level Hyperscale AI Models

Jae-Gil Lee, SK hynix Inc.│Won-Tae Koo, SK hynix Inc.│Geonhui Lee, SK hynix Inc.│Jihun Kim, SK hynix Inc.│Woocheol Lee, SK hynix Inc.│Hyung Dong Lee, SK hynix Inc.│Sunghyun Yoon, SK hynix Inc.│Sung-In Hong, SK hynix Inc.│In-Ku Kang, SK hynix Inc.│Joongsik Kim, SK hynix Inc.│Hyejung Choi, SK hynix Inc.│Soo Gil Kim, SK hynix Inc.│Seho Lee, SK hynix Inc.│Jaeyun Yi, SK hynix Inc.│Seon Yong Cha, SK hynix Inc.

38-2: First demonstration of AFeFET Based Capacitor-Less eDRAM Computing-in-Memory Featuring 4.84 Mb/mm2 High Memory Density, 105 s Long Retention Time, and >1010 High Endurance

Hongtao Zhong, Tsinghua University│Zijie Zheng, National University of Singapore│Leming Jiao, National University of Singapore│Zuopu Zhou, National University of Singapore│Chen Sun, National University of Singapore│Wenjun Tang, Tsinghua University│Zhonghao Chen, Tsinghua University│Yuye Kang, National University of Singapore│Kaizhen Han, National University of Singapore│Vijaykrishnan Narayanan, Pennsylvania State University│Huazhong Yang, Tsinghua University│Thomas Kämpfe, Fraunhofer IPMS│Kai Ni, University of Notre Dame│Xiao Gong, National University of Singapore│Xueqing Li, Tsinghua University

38-3: The Energy-Accuracy-Security Trade-off in Resistive In-memory Architectures

Naresh Shanbhag, University of Illinois at Urbana-Champaign│Saion Roy, University of Illinois at Urbana-Champaign

38-4: Towards 3D CMOS+X Ising Machines: Addressing the Connectivity Problem with Back-end-of-line FeFETs

Tanvir Haider Pantha, The University of Texas at Dallas│Abhishek Khanna, Micron Technology│Huacheng Ye, Western Digital Corporation│Shaila Niazi, University of California, Santa Barbara│Biswadeep Chakraborty, Georgia Institute of Technology│Ethan G Weinstock, Georgia Institute of Technology│Nithin Babu, Georgia Institute of Technology│Saibal Mukhopadhyay, Georgia Institute of Technology│Suman Datta, Georgia Institute of Technology│Kerem Çamsari, University of California, Santa Barbara│Sourav Dutta, The University of Texas at Dallas

38-5: Experimental Demonstration of A CT-FeFET Array with Intrinsic Long-Short-Term Plasticity for Low-Cost Trajectory Prediction

Chao Li, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Jie Yu, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Xumeng Zhang, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Zhaohao Zhang, Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences│Fangduo Zhu, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Siyuan Ouyang, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Pei Chen, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Lingli Cheng, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Gaobo Xu, Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences│Qingzhu Zhang, Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences│Huaxiang Yin, Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences│Qi Liu, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University│Ming Liu, State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University

38-6: Experimental Demonstration of Resonant Adiabatic Writing and Computing in Ferroelectric Capacitive Memory Array for Energy-Efficient Edge AI

Jin Luo, Peking University│Bingrui Song, Peking University│Yuxin Lin, Peking University│Zhiyuan Fu, Peking University│Boyi Fu, Peking University│Weikai Xu, Peking University│Linxiao Shen, Peking University│Yuan Wang, Peking University│Qianqian Huang, Peking University│Ru Huang, Peking University

38-7: Novel Ferroelectric-based Ising Machine Featuring Reconfigurable Arbitrary Ising Graph and Controllable Annealing through Device-Algorithm Co-Optimization

Weikai Xu, Peking University│Jin Luo, Peking University│Zhiyuan Fu, Peking University│Runze Han, Peking University│Shengyu Bao, Peking University│Kaifeng Wang, Peking University│Qianqian Huang, Peking University│Ru Huang, Peking University

Session 39 Advanced Logic Technology (ALT) | Interconnect and Contact Process Technology

1:30 PM Continental 1-3

Co-Chairs: Kazuyuki Tomida, Rapidus and Martin OTOOLE, ASML

39-1: Fully subtractive Ru Topvia interconnects with minimum 9 nm-space airgap for RC performance and reliability enhancement as post-Cu interconnects

KOICHI MOTOYAMA, IBM Research│Jaemyung Choi, Samsung Electronics│Huai Huang, IBM Research│Chris Penny, IBM Research│Nick Lanzillo, IBM Research│Johnsoo Kim, Samsung Electronics│Joongsuk Oh, Samsung Electronics│Gwangsik Kim, Samsung Electronics│Janggeun Lee, Samsung Electronics│Sejun Park, Samsung Electronics│Taesun Kim, Samsung Electronics│Shobha Hosadurga, IBM Research│Darsith Jayachandran, IBM Research│Haojun Zhang, IBM Research│Joe Lee, IBM Research│Shravana Katakam, IBM Research│Gideon Oyibo, IBM Research│Wei-Tsu Tseng, IBM Research│Belle Antonovich, IBM Research│Nicholas Latham, IBM Research│Wai Kin Li, IBM Research│Chung Ju Yang, IBM Research│Samuel Munnangi, IBM Research│Andy Simon, IBM Research│Su Chen Fan, IBM Research│John Arnold, IBM Research│Tenko Yamashita, IBM Research│Kisik Choi, IBM Research│Kang-ill Seo, Samsung Electronics│Dechao Guo, IBM Research│Huiming Bu, IBM Research

39-2: Subtractive Ruthenium Interconnects with Airgap

Ananya Dutta, Intel Corporation│Akshit Peer, Intel Corporation│Christopher Jezewski, Intel Corporation│Saima Siddiqui, Intel Corporation│Ian Jenkins, Intel Corporation│Emmannuel Khora, Intel Corporation│Gauri Auluck, Intel Corporation│YuWen Huang, Intel Corporation│Felipe Bedoya, Intel Corporation│Nafees Kabir, Intel Corporation│Supriya Mocherla, Intel Corporation│Puja Rani Saha, Intel Corporation│Leah Shoer, Intel Corporation│Kyle Chan, Intel Corporation│Akhilesh Tanneeru, Intel Corporation│Jay P Gupta, Intel Corporation│Vijay Bharamaiah Jeevendrakumar, Intel Corporation│David E Collins, Intel Corporation│Syam Madhusoodhanan, Intel Corporation│Jeff Bielefeld, Intel Corporation│William Brezinski, Intel Corporation│Remi Fayad, Intel Corporation│Supanee Sukrittanon, Intel Corporation│Sudipto Naskar, Intel Corporation│Sreenivas Kosaraju, Intel Corporation│Nityan Nair, Intel Corporation│Gurpreet Singh, Intel Corporation│Joseph D Silva, Intel Corporation│Clifford J Engel, Intel Corporation│Franco Noel, Intel Corporation│Brian J Krist, Intel Corporation│Jimmy Wang, Intel Corporation│Matthew V Metz, Intel Corporation│Mauro J Kobrinsky, Intel Corporation

39-3: NbTiN based two-metal level semi-damascene interconnects, Josephson junctions and capacitors for Superconducting Digital Logic

Ankit Pokhrel, IMEC│Daniel Perez Lozano, IMEC│Jean-Philippe Soulie, IMEC│Diziana Vangoidsenhoven, IMEC│Sujan Sarkar, IMEC│Rajendra Saroj, IMEC│Yann Canvel, IMEC│Vincent Renaud, IMEC│Bart Kenens, IMEC│Amey Walke, IMEC│Jasper Bizindavyi, IMEC│Sara Iraci, IMEC│Seifallah Ibrahim, IMEC USA│Blake Hodges, IMEC USA│Trent Josephsen, IMEC USA│Manu Perumkunnil, IMEC│Benjamin Huet, IMEC│Sabine O’Neal, IMEC USA│Quentin Herr, IMEC USA│Zsolt Tokei, IMEC│Anna Herr, IMEC USA

39-4: Graphene as new conductors in Back-End-Of-Line: non-catalytic growth, doping, integration and reliability

Keun Wook Shin, Samsung Advanced Institute of Technology│Changhyun Kim, Samsung Advanced Institute of Technology│Sangjun Lee, Samsung Advanced Institute of Technology│Joung Eun Yoo, Samsung Advanced Institute of Technology│Baekwon Park, Samsung Advanced Institute of Technology│Eun-Kyu Lee, Samsung Advanced Institute of Technology│Dong-Su Ko, Samsung Advanced Institute of Technology│Alum Jung, Samsung Advanced Institute of Technology│Dae-Jin Yang, Samsung Advanced Institute of Technology│Chang-Seok Lee, Samsung Advanced Institute of Technology│Sang Won Kim, Samsung Advanced Institute of Technology│Kyung-Eun Byun, Samsung Advanced Institute of Technology

39-5: Nb Contacts for Thermally-stable High-performance Logic and Memory Peripheral Transistor

RITAM SARKAR, IMEC│Romain Ritzenthaler, IMEC│Jean Luc Everaert, IMEC│Pierre Eyben, IMEC│Kiroubanand Sankaran, IMEC│Clément Porret, IMEC│Prafulla Gupta, IMEC│Jishnu Ganguly, IMEC│Hiroaki Arimura, IMEC│Jef Geypen, IMEC│Elena Capogreco, IMEC│Saemi Roh, SK Hynix│Vladimir Machkaoutsan, Micron Technology│Lucas PB Lima, IMEC│Min Kim, IMEC│Alessio Spessot, IMEC│Naoto Horiguchi, IMEC

39-6: Direct extraction of contact and S/D epi access resistance components on 45nm Gate Pitch NS-based n-FET devices for the 2nm node

Pierre Eyben, IMEC│Andrea Pondini, IMEC│An De Keersgieter, IMEC│Hiroaki Arimura, IMEC│Hans Mertens, IMEC│Thomas Chiarella, IMEC│Clément Porret, IMEC│Erik Rosseel, IMEC│Ritam Sarkar, IMEC│Maryam Hosseini, IMEC│Xiuju Zhou, IMEC│Lennaert Wouters, IMEC│Philippe Matagne, IMEC│Jerome Mitard, IMEC│Naoto Horiguchi, IMEC

Session 40 Power, Microwave/Mm-Wave and Analog Devices/Systems (PMA) | Device Physics in Wide-Bandgap Power Devices

1:30 PM Continental 4

Co-Chairs: Takuya MAEDA, The University of Tokyo and Ho-Young CHA, Hongik University

40-1: High channel mobililty and stable E-mode operation in AlSiO/AlN/m-plane p-type GaN MOSFETs with little temperature dependence of the threshold voltage

Kenji Ito, Toyota Central R&D Lab., Inc.│Tetsuo Narita, Toyota Central R&D Lab., Inc.│Masakazu Kanechika, Nagoya University│Hiroko Iguchi, Toyota Central R&D Lab., Inc.│Shiro Iwasaki, Toyota Central R&D Lab., Inc.│Daigo Kikuta, Toyota Central R&D Lab., Inc.│Emi Kano, Nagoya University│Nobuyuki Ikarashi, Nagoya University│Kazuyoshi Tomita, Nagoya University│Jun Suda, Nagoya University│Tetsuo Kachi, Nagoya University

40-2: Achieving 205 cm2 V-1s-1 Inversion Channel Mobility in 1.4 kV Vertical GaN-on-GaN MISFET With Nitride Gate Dielectric

Shu Yang, University of Science & Technology of China

40-3: Drastic Mobility Enhancement of GaN MOSFETs with Graded AlGaN Buried-Channel Formed by Aluminum Thermal Diffusion

Tsurugi Kondo, Fuji Electric Co., Ltd.│Katsunori Ueno, Fuji Electric Co., Ltd.│Ryo Tanaka, Fuji Electric Co., Ltd.│Takuro Inamoto, Fuji Electric Co., Ltd.│Shinya Takashima, Fuji Electric Co., Ltd.

40-4: Unique electron trapping and its impacts on electron mobility in SiC n-channel MOSFETs

Xilun Chi, Department of Electronic Science and Eng., Kyoto University│Koji Ito, Department of Electronic Science and Eng., Kyoto University│Takeru Suto, Hitachi, Ltd. R&D Group│Akio Shima, Hitachi, Ltd. R&D Group│Mitsuaki Kaneko, Department of Electronic Science and Eng., Kyoto University│Tsunenobu Kimoto, Department of Electronic Science and Eng., Kyoto University

40-5: Wrap-Around Gate delivering 600V/1.0 mΩ∙cm2, Normally-Off, Dispersion-Free CAVETs with Record-High Gate Swing

Xinyi Wen, Stanford University│Hayao Kasai, Stanford University│Koukichi Fujita, Research Institute for Advanced Material and Devices, Corporate R&D Group, Kyocera│Tsuyoshi Yamasaki, Research Institute for Advanced Material and Devices, Corporate R&D Group, Kyocera│Tatsuro Sawada, Research Institute for Advanced Material and Devices, Corporate R&D Group, Kyocera│Maliha Noshin, Stanford University│Chuanzhe Meng, Stanford University│Srabanti Chowdhury, Stanford University

40-6: An All-GaN Semiconducting-Gate HEMT for Inherent Gate-Level High-Voltage Protection and Synchronous Switching with Photoelectrically Enhanced Conductivity

Haochen Zhang, The Hong Kong University of Science and Technology│Sirui Feng, The Hong Kong University of Science and Technology│Tao Chen, The Hong Kong University of Science and Technology│Li Zhang, The Hong Kong University of Science and Technology│Wenjie Song, The Hong Kong University of Science and Technology│Song Yang, The Hong Kong University of Science and Technology│Yutao Geng, The Hong Kong University of Science and Technology│Zheyang Zheng, The Hong Kong University of Science and Technology│Kevin Chen, The Hong Kong University of Science and Technology

40-7: First Characterization of Si, SiC and GaN Power Deivces at Deep Cryogenic Temperatures down to 0.1 K

Xin Yang, Virginia Tech│Matthew Porter, Virginia Tech│Zineng Yang, Virginia Tech│Zichen Xi, Virginia Tech│Qiang Li, Virginia Tech│Linbo Shao, Virginia Tech│Yuhao Zhang, Virginia Tech

40-8: Catalyzing Innovation: Bridging System Efficiency to Fundamental Device Physics

Christian Koller, Infineon│Matthias Kasper, Infineon│Boris Butej, KAI GmbH│Dominik Wieland, Infineon│Borja Alberdi, Infineon│Oliver Haeberlen, Infineon│Clemens Ostermaier, Infineon

Session 41 Optoelectronics, Displays, and Imaging Systems (ODI) | Advanced Image Sensors

1:30 PM Continental 6

Co-Chairs: Kazuko Nishimura, Panasonic Holdings Corporation and Frederic Lalanne, ST Microelectronics

41-1: A Novel 1/1.3-inch 50 Megapixel Three-wafer-stacked CMOS Image Sensor with DNN Circuit for Edge Processing

Ryoichi Nakamura, Sony Semiconductor Solutions Corp│Hidenobu Tsugawa, Sony Semiconductor Solutions Corp│Hajime Yamagishi, Sony Semiconductor Solutions Corp│Yutaro Fujisaki, Sony Semiconductor Solutions Corp│Yosuke Suda, Sony Semiconductor Solutions Corp│Yukihiro Tatsumi, Sony Semiconductor Solutions Corp│Kan Shimizu, Sony Semiconductor Solutions Corp│Yoshihisa Kagawa, Sony Semiconductor Solutions Corp│Kenta Ono, Sony Semiconductor Solutions Corp│Yosuke Horie, Sony Semiconductor Solutions Corp│Ryoji Koganei, Sony Semiconductor Solutions Corp│Hiroshi Nakano, Sony Semiconductor Solutions Corp│Kazumi Kobayashi, Sony Semiconductor Solutions Corp│Takumi Kamibayashi, Sony Semiconductor Solutions Corp│Nobutatsu Araki, Sony Semiconductor Manufacturing Corp│Kenichi Saito, Sony Semiconductor Manufacturing Corp│Ryoma Suzue, Sony Semiconductor Manufacturing Corp│Wataru Otsuka, Sony Semiconductor Solutions Corp│Hayato Iwamoto, Sony Semiconductor Solutions Corp

41-2: Low Dark Noise and 8.5k e− Full Well Capacity in a 2-Layer Transistor Stacked 0.8µm Dual Pixel CIS with Intermediate Poly-Si Wiring

Yosuke Satake, Sony Semiconductor Solutions Corporation│Yusuke Tanaka, Sony Semiconductor Solutions Corporation│Shinya Sato, Sony Semiconductor Solutions Corporation│Masayuki Takase, Sony Semiconductor Solutions Corporation│Mizuki Hoyano, Sony Semiconductor Solutions Corporation│Shuhei Kasukawa, Sony Semiconductor Solutions Corporation│Manabu Tomita, Sony Semiconductor Solutions Corporation│Yoshiaki Kikuchi, Sony Semiconductor Solutions Corporation│Junpei Yamamoto, Sony Semiconductor Manufacturing Corporation│Kai Tokuhiro, Sony Semiconductor Manufacturing Corporation│Kazuya Furumoto, Sony Semiconductor Manufacturing Corporation│Hikari Sugino, Sony Semiconductor Manufacturing Corporation│Yusuke Murakawa, Sony Semiconductor Manufacturing Corporation│Soichiro Yamazaki, Sony Semiconductor Manufacturing Corporation│Hiroshi Mizuno, Sony Semiconductor Manufacturing Corporation│Hiroshi Tomita, Sony Semiconductor Manufacturing Corporation│Noriteru Yamada, Sony Semiconductor Manufacturing Corporation│Tomoyuki Hirano, Sony Semiconductor Solutions Corporation│Yoshiaki Kitano, Sony Semiconductor Solutions Corporation

41-3: A High-Performance 2.2µm 1-Layer Pixel Global Shutter CMOS Image Sensor for Near-Infrared Applications

Tae-Min Kim, Samsung Electronics│Jungsan Kim, Samsung Electronics│Seungho Lee, Samsung Electronics│Yongsoon Park, Samsung Electronics│Jong Uk Kim, Samsung Electronics│Sangjin Choi, Samsung Electronics│Hyoeun Kim, Samsung Electronics│SeungKuk Kang, Samsung Electronics│Sang Hoon Song, Samsung Electronics│Hoonil Yang, Samsung Electronics│Somin Park, Samsung Electronics│Taehyoung Kim, Samsung Electronics│Yoonjay Han, Samsung Electronics│Suji Hwang, Samsung Electronics│Tae-Yon Lee, Samsung Electronics│Hongki Kim, Samsung Electronics│Seung-Sik Kim, Samsung Electronics│Heesung Shim, Samsung Electronics│Jonghyun Go, Samsung Electronics│Jae-Kyu Lee, Samsung Electronics│Chang-Rok Moon, Samsung Electronics│Jaihyuk Song, Samsung Electronics

41-4: First Demonstration of 2.5D Out-of-Plane-Based Hybrid Stacked Super-Bionic Compound Eye CMOS Chip with Broadband (300-1600 nm) and Wide-Angle (170°) Photodetection

Yunfei Xie, zhejiang university│Yang Xu, zhejiang university│Xiaochen Wang, zhejiang university│Jing He, Westlake University│zhixiang zhang, zhejiang university│Hao Ning, zhejiang university│Srikrishna Chanakya Bodepudi, zhejiang university│Jiye Li, Westlake University│Zongwen Li, zhejiang university│QianQian Zhang, zhejiang university│Yance Chen, zhejiang university│Zijian Pan, zhejiang university│Yuan Ma, zhejiang university│Yue Dai, zhejiang university│Jian Chai, zhejiang university│Muhammad Abid Anwar, zhejiang university│Bin Yu, zhejiang university│Liaoyong Wen, Westlake University│Yongliang Xie, zhejiang university│Youshui He, zhejiang university│Jiangming Lin, zhejiang university

41-5: Pseudo-direct LiDAR by deep-learning-assisted high-speed multi-tap charge modulators

Keiichiro Kagawa, Shizuoka University│Keita Yasutomi, Shizuoka University│Michitaka Yoshida, Japan Society for the Promotion of Science│Daisuke Hayashi, Shizuoka University│De Xing Lioe, Shizuoka University│Shoji Kawahito, Shizuoka University│Hajime Nagahara, Osaka University

41-6: A Color Image Sensor Using 1.0-µm Organic Photoconductive Film Pixels Stacked on 4.0-µm Si Pixels for Near-Infrared Time-of-Flight Depth Sensing

Tomohiro Ohkubo, Sony Semiconductor Solutions Corporation│Nobuhiro Kawai, Sony Semiconductor Solutions Corporation│Kimiyasu Shiina, Sony Semiconductor Solutions Corporation│Kei Fukuhara, Sony Semiconductor Solutions Corporation│Ryotaro Takaguchi, Sony Semiconductor Solutions Corporation│Tetsuro Takada, Sony Semiconductor Solutions Corporation│Yoshito Nagashima, Sony Semiconductor Manufacturing Corporation│Takahito Niwa, Sony Semiconductor Manufacturing Corporation│Masahiro Joei, Sony Semiconductor Solutions Corporation│Kensaku Maeda, Sony Semiconductor Solutions Corporation│Tomoyuki Hirano, Sony Semiconductor Solutions Corporation│Atsushi Suzuki, Sony Semiconductor Solutions Corporation│Hideaki Togashi, Sony Semiconductor Solutions Corporation│Tetsuji Yamaguchi, Sony Semiconductor Solutions Corporation│Yusuke Oike, Sony Semiconductor Solutions Corporation

41-7: Pb-free Colloidal InAs Quantum Dot Image Sensor for Infrared

Osamu Enoki, Sony Semiconductor Solutions Corporation│Hiroshi Kato, Sony Semiconductor Solutions Corporation│Yuta Okabe, Sony Semiconductor Solutions Corporation│Shuichi Takizawa, Sony Semiconductor Solutions Corporation│Tomonari Nakada, Sony Semiconductor Solutions Corporation│Yusuke Moriya, Sony Semiconductor Solutions Corporation│Kensaku Maeda, Sony Semiconductor Solutions Corporation│Hayato Iwamoto, Sony Semiconductor Solutions Corporation

41-8: Lead-Free Quantum Dot Photodiodes for Next Generation Short Wave Infrared Optical Sensors

Wenya Song, imec│Stefano Guerrieri, ams OSRAM│Zeger Hens, Ghent University│Valeriia Grigel, QustomDot│Roelof Steeno, ChemStream│Jing Bai, Ghent University│Yuhao Deng, Ghent University│Ezat Kheradmand, Ghent University│Jaqueline de Oliveira Rocha, Ghent University│Igor Nakonechnyi, QustomDot│Willem Walravens, QustomDot│Isabel Pintor Monroy, imec│Itai Lieberman, imec│Arman Uz Zaman, imec│JooHyoung Kim, imec│Tristan Weydts, imec│Marina Vildanova, imec│Pawel Malinowski, imec

Session 42 Emerging Device and Compute Technology (EDT) | Magnetic Devices for Memory and Computing

1:30 PM Continental 7-9

Co-Chairs: Qiming Shao, Hong Kong University of Science & Technology and Louis Hutin, CEA-Leti

42-1: Achieving 1ppm write-error rate in SOT-MRAM with synthetic antiferromagnetic free layer

Dai Nguyen, IMEC│Giacomo Talmelli, IMEC│Maxwel Gama Monteiro, IMEC│Alvaro Palomino Lopez, IMEC│Vaishnavi Kateel, IMEC│Domenico Giuliano, IMEC│Simon Van Beek, IMEC│Natan Vandermeeren, IMEC│Nathali Franchina, IMEC│Kurt Wostyn, IMEC│Sebastien Couet, IMEC

42-2: First CMOS-integrated 128 Kb antiferromagnet-based MRAM with immunity to 3 T magnetic fields

Danrong Xiong, Truth Memory Tech. Corporation│Xiaofei Fan, Truth Memory Tech. Corporation│Chuanpeng Jiang, Beihang University│Gefei Wang, Truth Memory Tech. Corporation│Hong-xi Liu, Truth Memory Tech. Corporation│Shiyang Lu, Beihang University│Hongchao Zhang, Truth Memory Tech. Corporation│Jinhao Li, Beihang University│He Zhang, Beihang University│Kaihua Cao, Beihang University│Zhaohao Wang, Beihang University│Weisheng Zhao, Beihang University

42-3: Field-Free Rashba-Type Crystal Torque MRAM with High Efficiency and Thermal Stability

Puyang Huang, ShanghaiTech University│Shan Yao, ShanghaiTech University│Aitian Chen, University of Electronic Science and Technology of China│Zhenghang Zhi, ShanghaiTech University│Chenyi Fu, Beihang University│Zheng Zhu, Suzhou Inston Technology Co., Ltd.│Peng Chen, Songshan Lake Materials Laboratory│Hao Wu, Songshan Lake Materials Laboratory│Di Wu, Suzhou Inston Technology Co., Ltd.│Shouzhong Peng, Beihang University│Yumeng Yang, ShanghaiTech University│Xixiang Zhang, King Abdullah University of Science and Technology│Xufeng Kou, ShanghaiTech University

42-4: A novel Channel-less SOT-MRAM with 115% TMR, 2 ns Switching, and High Bit Yield (>99.9%)

Enlong Liu, Zhejiang Hikstor Technology Co. LTD│Wenlong Yang, Zhejiang Hikstor Technology Co. LTD│Kaiyuan Zhou, Zhejiang Hikstor Technology Co. LTD│Yang Gao, Zhejiang Hikstor Technology Co. LTD│Zhenghui Ji, Zhejiang Hikstor Technology Co. LTD│Dinggui Zeng, Zhejiang Hikstor Technology Co. LTD│Ming Wang, Zhejiang Hikstor Technology Co. LTD│Qingxiu Li, Zhejiang Hikstor Technology Co. LTD│Yifan Xi, Zhejiang Hikstor Technology Co. LTD│Dandan Yang, Zhejiang Hikstor Technology Co. LTD│Guilin Chen, Zhejiang Hikstor Technology Co. LTD│Hao Zhou, Zhejiang Hikstor Technology Co. LTD│Yihui Sun, Zhejiang Hikstor Technology Co. LTD│Zejie Zheng, Zhejiang Hikstor Technology Co. LTD│Qijun Guo, Zhejiang Hikstor Technology Co. LTD│Qiang Dai, Zhejiang Hikstor Technology Co. LTD│Fantao Meng, Zhejiang Hikstor Technology Co. LTD│Shikun He, Zhejiang Hikstor Technology Co. LTD

42-5: Cryogenic In-Memory Computing Circuits with Giant Anomalous Hall Current in Magnetic Topological Insulators for Quantum Control

Kun Qian, Hong Kong University of Science and Technology│Albert Lee, InstonTech.│Zhihua Xiao, Hong Kong University of Science and Technology│Haoran He, University of California, Los Angeles│Shunkong Cheung, Hong Kong University of Science and Technology│Yuting Liu, Harbin Institute of Technology│Ferris Nugraha, Hong Kong University of Science and Technology│Qiming Shao, Hong Kong University of Science and Technology

42-6: Spin Devices for Nonvolatile Memories, Unconventional Computing, and Energy Harvesting

Hyunsoo Yang, National University of Singapore│Guoyi Shi, National University of Singapore│Yuchen Pu, National University of Singapore│Qu Yang, National University of Singapore│Yakun Liu, National University of Singapore│Fei Wang, National University of Singapore│Jia Si, National University of Singapore│Raghav Sharma, National University of Singapore