sci_loopback_int的例程（中断程序）

例程代码如下： #include "DSP28x_Project.h"     // Device Headerfile and Examples Include File #define CPU_FREQ         40E6        // Default = 40 MHz. Change to 60E6 for 60 MHz devices #define LSPCLK_FREQ CPU_FREQ/4 #define SCI_FREQ         100E3 #define SCI_PRD         (LSPCLK_FREQ/(SCI_FREQ*8))-1 // Prototype statements for functions found within this file. interrupt void sciaTxFifoIsr(void); interrupt void sciaRxFifoIsr(void); interrupt void scibTxFifoIsr(void); interrupt void scibRxFifoIsr(void); void scia_fifo_init(void); void scib_fifo_init(void); void error(void); // Global variables Uint16 sdataA[2];    // Send data for SCI-A Uint16 rdataA[2];    // Received data for SCI-A Uint16 rdata_pointA; // Used for checking the received data void main(void) {    Uint16 i; // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the DSP2802x_SysCtrl.c file.    InitSysCtrl(); // Step 2. Initalize GPIO: // This example function is found in the DSP2802x_Gpio.c file and // illustrates how to set the GPIO to it's default state. // InitGpio(); // Setup only the GP I/O only for SCI-A and SCI-B functionality // This function is found in DSP2802x_Sci.c    InitSciGpio(); // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts    DINT; // Initialize PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the DSP2802x_PieCtrl.c file.    InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags:    IER = 0x0000;    IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the interrupt // is not used in this example.  This is useful for debug purposes. // The shell ISR routines are found in DSP2802x_DefaultIsr.c. // This function is found in DSP2802x_PieVect.c.    InitPieVectTable(); // Interrupts that are used in this example are re-mapped to // ISR functions found within this file.    EALLOW;        // This is needed to write to EALLOW protected registers    PieVectTable.SCIRXINTA = &sciaRxFifoIsr;    PieVectTable.SCITXINTA = &sciaTxFifoIsr;    EDIS;   // This is needed to disable write to EALLOW protected registers // Step 4. Initialize all the Device Peripherals: // This function is found in DSP2802x_InitPeripherals.c // InitPeripherals(); // Not required for this example    scia_fifo_init();  // Init SCI-A // Step 5. User specific code, enable interrupts: // Init send data.  After each transmission this data // will be updated for the next transmission    for(i = 0; i<2; i++)    {       sdataA = i;    }    rdata_pointA = sdataA[0]; // Enable interrupts required for this example    PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block    PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1    PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2    IER = 0x100;        // Enable CPU INT    EINT; // Step 6. IDLE loop. Just sit and loop forever (optional):         for(;;); } void error(void) {     asm("     ESTOP0"); // Test failed!! Stop!     for (;;); } interrupt void sciaTxFifoIsr(void) {     Uint16 i;     for(i=0; i< 2; i++)     {            SciaRegs.SCITXBUF=sdataA;     // Send data         }     for(i=0; i< 2; i++)                 //Increment send data for next cycle     {            sdataA = (sdataA+1) & 0x00FF;         }         SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;        // Clear SCI Interrupt flag         PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK } interrupt void sciaRxFifoIsr(void) {     Uint16 i;         for(i=0;i<2;i++)         {            rdataA=SciaRegs.SCIRXBUF.all;         // Read data         }         for(i=0;i<2;i++)                     // Check received data         {            if(rdataA != ( (rdata_pointA+i) & 0x00FF) ) error();         }         rdata_pointA = (rdata_pointA+1) & 0x00FF;         SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag         SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag         PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack } void scia_fifo_init() {    SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback                                   // No parity,8 char bits,                                   // async mode, idle-line protocol    SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,                                   // Disable RX ERR, SLEEP, TXWAKE    SciaRegs.SCICTL2.bit.TXINTENA =1;    SciaRegs.SCICTL2.bit.RXBKINTENA =1;    SciaRegs.SCIHBAUD = 0x0000;    SciaRegs.SCILBAUD = SCI_PRD;    SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back    SciaRegs.SCIFFTX.all=0xC022;    SciaRegs.SCIFFRX.all=0x0022;    SciaRegs.SCIFFCT.all=0x00;    SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset    SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;    SciaRegs.SCIFFRX.bit.RXFIFORESET=1; } //=========================================================================== // No more. //===========================================================================