Github 上有哪些优秀的 VHDL/Verilog/FPGA 项目

下表是按照STARS排列，由于公众号不能在文章中插入链接，所以请点击文末的：

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分别点击图中Verilog或者VHDL就可以进去点击链接进行查看。

STARS	FORKS	ISSUES	LAST COMMIT	NAME/PLACE	DESCRIPTION
1450	676	33	1 year, 1 month ago	e200_opensource/1	The Ultra-Low Power RISC Core
1371	362	27	5 months ago	picorv32/2	PicoRV32 - A Size-Optimized RISC-V CPU
1157	399	23	10 months ago	wujian100_open/3	IC design and development should be faster，simpler and more reliable
936	371	176	2 years ago	hw/4	RTL, Cmodel, and testbench for NVDLA
930	61	2	1 year, 6 months ago	amiga2000-gfxcard/5	MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog
886	119	7	20 hours ago	darkriscv/6	opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
618	160	10	3 years ago	miaow/7	An open source GPU based off of the AMD Southern Islands ISA.
615	921	25	a day ago	hdl/8	HDL libraries and projects
581	70	0	2 months ago	zipcpu/9	A small, light weight, RISC CPU soft core
573	199	16	16 hours ago	verilog-ethernet/10	Verilog Ethernet components for FPGA implementation
547	194	30	2 years ago	oh/11	Verilog library for ASIC and FPGA designers
487	426	38	23 days ago	uhd/12	The USRP™ Hardware Driver Repository
475	87	11	2 hours ago	corundum/13	Open source, high performance, FPGA-based NIC
409	192	6	1 year, 10 months ago	ODriveHardware/14	High performance motor control
400	138	4	5 months ago	open-fpga-verilog-tutorial/15	Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
387	86	38	3 days ago	sd2snes/16	SD card based multi-purpose cartridge for the SNES
384	149	1	3 years ago	mips-cpu/17	MIPS CPU implemented in Verilog
360	71	0	9 months ago	LeFlow/18	Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
317	116	24	2 months ago	mor1kx/19	mor1kx - an OpenRISC 1000 processor IP core
294	139	0	5 years ago	FPGA-Imaging-Library/20	An open source library for image processing on FPGA.
289	151	37	4 years ago	riffa/21	The RIFFA development repository
286	48	11	4 months ago	riscv-formal/22	RISC-V Formal Verification Framework
270	96	0	2 years ago	verilog/23	Repository for basic (and not so basic) Verilog blocks with high re-use potential
269	89	7	1 year, 4 months ago	icezum/24	�� IceZUM Alhambra: an Arduino-like Open FPGA electronic board
267	124	14	8 years ago	netfpga/25	NetFPGA 1G infrastructure and gateware
255	43	8	4 days ago	serv/26	SERV - The SErial RISC-V CPU
252	86	4	a month ago	verilog-axi/27	Verilog AXI components for FPGA implementation
250	37	8	3 months ago	VerilogBoy/28	A Pi emulating a GameBoy sounds cheap. What about an FPGA?
243	27	7	1 year, 4 months ago	Project-Zipline/29	Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
235	114	6	6 years ago	FPGA-Litecoin-Miner/30	A litecoin scrypt miner implemented with FPGA on-chip memory.
213	54	2	2 years ago	zet/31	Open source implementation of a x86 processor
210	96	16	2 years ago	convolution_network_on_FPGA/32	CNN acceleration on virtex-7 FPGA with verilog HDL
209	20	65	7 months ago	ucr-eecs168-lab/33	The lab schedules for EECS168 at UC Riverside
198	85	2	3 months ago	cores/34	Various HDL (Verilog) IP Cores
194	21	20	1 year, 6 days ago	spispy/35	An open source SPI flash emulator and monitor
193	37	1	3 years ago	ridecore/36	RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
190	53	32	24 days ago	OpenROAD/37	OpenROAD's unified application implementing an RTL-to-GDS Flow
190	69	0	a month ago	basic_verilog/38	Must-have verilog systemverilog modules
190	46	1	5 months ago	riscv/39	RISC-V CPU Core (RV32IM)
189	30	4	6 days ago	Flute/40	RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
184	69	13	11 months ago	fpu/41	synthesiseable ieee 754 floating point library in verilog
183	49	22	8 years ago	fpga_nes/42	FPGA-based Nintendo Entertainment System Emulator
181	62	1	4 years ago	verilog-6502/43	A Verilog HDL model of the MOS 6502 CPU
179	35	13	a month ago	Piccolo/44	RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)
174	64	6	16 hours ago	verilog-pcie/45	Verilog PCI express components
173	58	10	5 months ago	Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA/46	Verilog Generator of Neural Net Digit Detector for FPGA
168	7	1	1 year, 9 months ago	fpga-chip8/47	CHIP-8 console on FPGA
165	169	1	4 months ago	fpga/48	The USRP™ Hardware Driver FPGA Repository
163	26	5	2 years ago	TinyFPGA-B-Series/49	Open source design files for the TinyFPGA B-Series boards.
162	21	0	6 years ago	ez8/50	The Easy 8-bit Processor
156	37	94	6 hours ago	basejump_stl/51	BaseJump STL: A Standard Template Library for SystemVerilog
155	10	0	11 months ago	fpg1/52	PDP-1 FPGA implementation in Verilog, with CRT, Teletype and Console.
153	32	14	6 hours ago	openlane/53	OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
150	52	1	3 years ago	sdram-controller/54	Verilog SDRAM memory controller
146	47	3	10 months ago	AccDNN/55	A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
146	59	2	1 year, 4 months ago	verilog-i2c/56	Verilog I2C interface for FPGA implementation
145	65	0	2 months ago	Kryon/57	FPGA,Verilog,Python
142	61	4	1 year, 6 months ago	verilog-uart/58	Verilog UART
137	53	2	6 months ago	sha256/59	Hardware implementation of the SHA-256 cryptographic hash function
137	50	3	2 years ago	CNN-FPGA/60	使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用
133	20	1	9 days ago	wb2axip/61	Bus bridges and other odds and ends
127	102	114	3 months ago	black-parrot/62	A Linux-capable host multicore for and by the world
124	38	0	6 years ago	milkymist/63	SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU
123	24	0	1 year, 10 months ago	SimpleVOut/64	A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
122	23	4	11 months ago	FPGA-peripherals/65	�� ❄️ Collection of open-source peripherals in Verilog
119	41	5	1 year, 2 months ago	Tang_E203_Mini/66	LicheeTang 蜂鸟E203 Core
118	66	3	3 years ago	FPGA_Based_CNN/67	FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
118	44	2	a month ago	SCALE-MAMBA/68	Repository for the SCALE-MAMBA MPC system
116	25	0	a month ago	wbuart32/69	A simple, basic, formally verified UART controller
113	41	3	6 years ago	fpganes/70	NES in Verilog
113	41	19	11 months ago	open-register-design-tool/71	Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
110	20	5	1 year, 6 months ago	DisplayPort_Verilog/72	A Verilog implementation of DisplayPort protocol for FPGAs
110	51	0	27 days ago	openwifi-hw/73	FPGA/hardware design of openwifi
110	77	16	2 years ago	orpsoc-cores/74	Core description files for FuseSoC
108	57	0	5 days ago	aes/75	Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.
107	41	0	22 days ago	schoolMIPS/76	CPU microarchitecture, step by step
106	58	5	a month ago	openofdm/77	Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
106	26	1	23 days ago	iceGDROM/78	An FPGA based GDROM emulator for the Sega Dreamcast
105	10	0	2 years ago</