初学FPGA--简单易学的流水灯

初学FPGA–简单易学的流水灯
初学者必会的流水灯

module    led   (
input        wire        clk,
input        wire        rst,
output      reg [7:0] led

);

reg         [25:0] cnt;
localparam   T=50_000_000;  //1秒

always@(posedge clk or posedge rst) begin
if(rst)
	cnt<=0;
else if(cnt==T-1)
	cnt<=0;
else
	cnt<=cnt+1;
end

always@(posedge clk or posedge rst) begin

if(rst)
	led<=8'b1000_0000;
else if(cnt==T-1)
	led<={led[0],led[7:1]};          //从左向右移动
else
	led<=led;
end
endmodule