Timing performance of nanoment digital circuits under process variation------book reading

1) Process variation are classified as systematic and nonsystematic variations. And it will be divided into two types of variations, inter-die and intra-die variation.

2) Variations in the physical parameters of devices and interconnections (channel length, channel width, gate oxide thickness, wire width and thickness) result in variations in their electrical characteristics (drive current, threshold voltage, wire resistance and capacitance). They produce performance variations at gate level (gate delay, slew rate, wire delay, power consumption), which translates into variations of performance at circuit and system level.

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5) Systematic (deterministic) variations are those that are produced systematically by the same steps of the manufacturing flow.

6) Nonsystematic variation are those that are produced randomly from a large number of process steps and equipment used in the manufacturing flow. This kind of variations can be divided according to their behavior as inter-die (global) and intradie (local) variations. Both kinds of variations are described below.

7) inter-die

Inter-die (D2D) variations (or global or die-to-die variations) affect all manufactured

devices of a chip in the same way

8) intra-die

Intra-die (WID) variations (or local or within-die variations) affect each manufactured device in the same chip differently.