Synthesis step can be split to three step:
Elaborate: create a generic netlist that is to be synthesized. This command include four steps: builds data structures; infers registers in the design; performs higher-level HDL optimization, such as dead code removal; checks semantics.
Syn_generic: rtl optimization
Syn_map: map the specified design to the cells decribed in the supplied technology library and performs logic optimization. This command include three steps: technology-independent Boolean optimization, technology mapping, technology-dependent ate optimization
Syn_opt –spatial: this command performs a fast coarse-grained placement to get a better estimate of the long wires. Will execute innovus
Syn_opt –physical: utilizing Innovus placement and optimization in combination with Genus native physical optimization features
Syn_opt –incremental: further incremental refinement after an initial syn_opt call has been executed