verilog中用“<= “ 和 “=”赋值的区别

“<=”是非阻塞赋值，“=”是阻塞赋值

例

当执行到第46行时，线程会暂停在赋值处等待赋值完成再进行下面的语句，因此sel的值为：0，1，2，3，0，1，2，3 。。。。

此处执行到46行时，并不会等待赋值的完成，而是进行下面的if判断，因此实际上，sel的4并不会被清零，所以sel的值为：0，1，2，3，4，0，1，2，3，4。。。。。

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附上本次的实现的在basy3板上数码管上显示0078数字的代码

`timescale 1ns / 1ps
//
// Company: 
// Engineer: 
// 
// Create Date: 2017/11/21 12:33:01
// Design Name: 
// Module Name: last4
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//


module last4(
    input CLK,
    output reg[10:0]display_out
    );
    reg[19:0]count = 0;
    reg[2:0]sel = 0;
    parameter T1MS = 50000;
    always@(posedge CLK)
    begin
    case(sel)
    0:display_out <= 11'b01110000001;
    1:display_out <= 11'b10110000001;
    2:display_out <= 11'b11010001111;
    3:display_out <= 11'b11100000000;
    default:display_out <= 11'b11111111111;
    endcase
    end
    always@(posedge CLK)
    begin
    count <= count + 1;
    if(count == T1MS)
        begin
        count <= 0;
        sel <= sel + 1;
        if (sel == 4)
            sel <= 0;
        end

     end   
endmodule

约束文件

set_property PACKAGE_PIN W5 [get_ports CLK]
set_property IOSTANDARD LVCMOS33 [get_ports CLK]
set_property PACKAGE_PIN W4 [get_ports {display_out[10]}]
set_property PACKAGE_PIN V4 [get_ports {display_out[9]}]
set_property PACKAGE_PIN U4 [get_ports {display_out[8]}]
set_property PACKAGE_PIN U2 [get_ports {display_out[7]}]
set_property PACKAGE_PIN W7 [get_ports {display_out[6]}]
set_property PACKAGE_PIN W6 [get_ports {display_out[5]}]
set_property PACKAGE_PIN U8 [get_ports {display_out[4]}]
set_property PACKAGE_PIN V8 [get_ports {display_out[3]}]
set_property PACKAGE_PIN U5 [get_ports {display_out[2]}]
set_property PACKAGE_PIN V5 [get_ports {display_out[1]}]
set_property PACKAGE_PIN U7 [get_ports {display_out[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[10]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[9]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[8]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display_out[0]}]