module top_module(
input clk,
input areset, // Freshly brainwashed Lemmings walk left.
input bump_left,
input bump_right,
input ground,
input dig,
output walk_left,
output walk_right,
output aaah,
output digging );
parameter L=0,R=1,LF=2,RF=3,LDIG=4,RDIG=5;
reg [2:0] state, next_state;
always @(*) begin
// State transition logic
case(state)
L: next_state = ground?(dig?LDIG:(bump_left?R:L)):LF;
R: next_state = ground?(dig?RDIG:(bump_right?L:R)):RF;
LF: next_state = ground?(L):LF;
RF: next_state = ground?(R):RF;
LDIG: next_state = ground?LDIG:LF;
RDIG: next_state = ground?RDIG:RF;
endcase
end
always @(posedge clk, posedge areset) begin
// State flip-flops with asynchronous reset
if(areset) state<=L;
else state <= next_state;
end
assign walk_left = (state==L);
assign walk_right = (state==R);
assign aaah = (state==LF || state==RF);
assign digging= (state==LDIG || state==RDIG);
endmodule
Lemmings3
最新推荐文章于 2022-05-14 22:03:03 发布