Verilog中函数实例

  • 给定深度计算位宽
function integer clogb2(input integer depth);
	begin
		for(clogb2 = 0; depth >0;clogb2 = clogb2 +1) begin
			depth = depth >> 1;
		end
		// clogb2 = clogb2 - 1;
		//此处不减则需要在定义reg或者端口的时候减
	end
endfunction
reg [clog2(depth)-1:0] cnt;
  • 常规函数格式
// --function to judge max eng

function [g_eng_resolution - 1 - 2 : 0] max
(
	input	[g_eng_resolution-1-2:0]	eng1,
	input	[g_eng_resolution-1-2:0]	eng2,
.......
	input	[g_eng_resolution-1-2:0]	eng8,
	input	[g_eng_resolution-1-2:0]	eng9
);
reg [g_eng_resolution - 1 - 2 : 0] engmax_11,engmax_12,engmax_13,engmax_14,engmax_15;
reg [g_eng_resolution - 1 - 2 : 0] engmax_21,engmax_22,engmax_23;
reg [g_eng_resolution - 1 - 2 : 0] engmax_31,engmax_32;
begin
	if (eng1>eng2)
		engmax_11 = eng1;
	else
		engmax_11 = eng2;
......
	engmax_32 = engmax_23;
	
	max = (engmax_31>engmax_32 )? engmax_31:engmax_32;
end	
endfunction
s_max_eng <= max(s_eng[0],(s_eng[1]),(s_eng[2]),(s_eng[3]),(s_eng[4]),(s_eng[5]),(s_eng[6]),(s_eng[7]),(s_eng[8]));
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