【FPGA】ILA错误:Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock..

问题描述

1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'u_ila_0' at location 'uuid_23E7D65A79BC59F7BC47406C1714DFAE' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'u_ila_1' at location 'uuid_3B505A030738513C98471D25F5B1F848' from probes file, since it cannot be found on the programmed device.
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Digilent/210308A47231

问题原因

ILA的debug hub时钟需要连接到一个常供的时钟上，如果连接的时钟没有时钟即会报上述错误。

解决方法

（1）首先要确保所抓的信号的时钟是提供的。

（2）如果有多个ILA，有的ILA时钟常供，有的ILA时钟可能会没有，那么通过修改自动生成的如下约束选择到常供的时钟即可。