异步FIFO（RAM存储）

module async_fifo(

module async_fifo(
 rst_n,
 fifo_wr_clk,
 fifo_wr_en,
 r_fifo_full,
 fifo_wr_data,
 
 fifo_rd_clk,
 fifo_rd_en,
 fifo_rd_data,
 r_fifo_empty);
 
 input rst_n;
 input fifo_wr_en;
 input fifo_rd_en;
 input fifo_rd_clk;
 input fifo_wr_clk; 
 input [7:0] fifo_wr_data;
 output reg r_fifo_empty;
 output reg r_fifo_full;
 output reg [7:0] fifo_rd_data;
 
 reg [9:0] rdaddress;
 reg [9:0] wraddress;
 reg [15:0][7:0] memory ;
 
 wire [9:0] gray_rdaddress;
 wire [9:0] gray_wraddress;
 
 reg [9:0] sync_w2r_r1,sync_w2r_r2;
 reg [9:0] sync_r2w_r1,sync_r2w_r2;
 
 wire fifo_empty;
 wire fifo_full;
 
 assign gray_rdaddress={1'b0,rdaddress[9:1]}^rdaddress;
 assign gray_wraddress={1'b0,wraddress[9:1]}^wraddress;
 
 assign fifo_empty = (gray_rdaddress==sync_w2r_r2);
 assign fifo_full = (gray_wraddress=={~sync_w2r_r2[9:8],sync_w2r_r2[7:0]});
 
 //使用memory
 
 
 /*用RAM的方法存储数据
 ram ram(
 .data(fifo_wr_data),
 .raddress(raddress[8:0]