1.软件版本
ISE14.7
2.本算法理论知识
AES加解密的流程图如下所示:
其中Sbox过程如下:
shiftRow过程如下:
mixcolumns过程如下:
AddRoundKey过程如下:
3.部分核心代码
`timescale 1ns / 1ps
module aes_tops(
Clock,
Reset,
loads,
enc_dec,
din,
FEK,
Ready,
dout,
Ready_Valid,
douts_Valid
);
input Clock;
input Reset;
input loads;
input enc_dec;
input [127:0]din;
input [127:0]FEK;
output Ready;
output[127:0]dout;
output Ready_Valid;
output[127:0]douts_Valid;
//==============================================
wire [127:0]new_key_generator;
wire new_key_ready;
wire new_key_sbox_access;
wire [7:0] new_key_sbox_dout;
wire new_key_sbox_decrypt;
wire mixcol_ready;
wire [127:0]mixcol_dout;
wire sub_ready;
wire [127:0]sub_dout;
wire [7:0] sub_sbox_dout;
wire sub_sbox_decrypt;
wire [7:0] sbox_dout;
//===============================================
reg Ready;
reg [127:0]dout;
reg Ready_Valid;
reg [127:0]douts_Valid;
reg next_ready;
reg new_key_Start;
reg [3:0] new_key_round;
reg [127:0]new_key_last_key;
reg mix_start;
reg [127:0]mix_din;
reg sub_start;
reg [127:0]sub_din;
reg [7:0] sbox_din;
reg sbox_decrypt;
reg state;
reg next_state;
reg [3:0] round;
reg [3:0] next_round;
reg [127:0]addroundkey_dout;
reg [127:0]Next_addroundkey_dout;
reg [127:0]addroundkey_data_reg;
reg [127:0]addroundkey_din;
reg addroundkey_Ready;
reg next_addroundkey_Ready;
reg addroundkey_start;
reg next_addroundkey_start;
reg [3:0] addroundkey_round;
reg [3:0] next_addroundkey_round;
reg first_round_reg;
reg next_first_round_reg;
reg[127:0] data_var;
reg[127:0] round_data_var;
reg[127:0] round_key_var;
//SBOX
Sbox_process Sbox_process_u(
.i_clk (Clock),
.i_rst (Reset),
.i_din (sbox_din),
.i_enc_dec(sbox_decrypt),
.o_dout (sbox_dout)
);
Sub_bit Sub_bit_u(
.i_clk (Clock),
.i_rst (Reset),
.i_start (sub_start),
.i_enc_dec (enc_dec),
.i_din (sub_din),
.o_ready (sub_ready),
.o_dout (sub_dout),
.o_Sboxout (sub_sbox_dout),
.o_Sboxdin (sbox_dout),
.o_Sboxed (sub_sbox_decrypt)
);
Mix_Col Mix_Col_u(
.i_clk (Clock),
.i_rst (Reset),
.i_enc_dec(enc_dec),
.i_start (mix_start),
.i_din (mix_din),
.o_ready (mixcol_ready),
.o_dout (mixcol_dout)
);
AES_Secret AES_Secret_u(
.i_clk (Clock),
.i_rst (Reset),
.i_start (new_key_Start),
.i_round (new_key_round),
.i_key1 (new_key_last_key),
.o_key2 (new_key_generator),
.o_ready (new_key_ready),
.o_Sboxi (new_key_sbox_access),
.o_Sbox_dout (new_key_sbox_dout),
.i_Sbox_din (sbox_dout),
.o_Sbox_decrypt(new_key_sbox_decrypt)
);
`include "process_.txt"
endmodule
4.操作步骤与仿真结论
加密和解密过程如下所示:
从仿真结果可知,
clear txt is '0000a1e4000009260000009b00000017',
the key txt is '0000000000 0000002468acf13579bde00'.
所以加密数据是 '652f967f0420c56df7177a38cd956270',
解密数据是'0000a1e4000009260000009b00000017',
通过布局布线之后,可以看到芯片的结构大概如下所示:
5.参考文献
这个部分,对应的理论参考文献为:
第一部分:S盒的设计(对应代码为:sbox_tops.v)
S盒对应的理论为:
第二部分:这篇论文中的2.2,轮变化。
这个部分的主要理论,我们主要见
A29-03