假如进行功耗仿真,在u_module_a.a_int起来后到u_module_n.b_int起来后的这段时间所有模块都在动作,即功耗值最大,那么这段时间的仿真波形可以拿来进行功耗分析,以下的ucli设置用来只收集这段时间内的仿真波形。
wave.do
的设置如下:
stop -once -condition harness.dut.u_module_a.a_int==1 -command { call \$fsdbDumpvars 0 "harness.dut" } -continue
stop -once -condition harness.dut.u_module_n.b_int==1 -command { call \$fsdbDumpFinish } -continue
run
命令的解释如下:
STOP
Use this command to set breakpoints in the simulation (for example, simv). The simulation can be stopped based on certain condition(s) or certain event(s). You can use this command to specify an action to be taken after the tool has stopped.
stop -condition { tool_condition } <stop-specification>
Use this option to add conditional expression to an existing breakpoint. Only one condition per breakpoint is supported. The expression cannot reference dynamic or automatic data, and must be written in VHDL syntax. When a breakpoint triggers, the expression is evaluated. If the resulting value is a logical false, the simulation automatically continues.
stop -once | -repeat <stop-id>|<stop-specification>
Use this command to control how often breakpoints are triggered. By default, all the breakpoints points are triggered repeatedly. If you specify the -once option, then the tool stops only once for the breakpoint with stop id, stop-id.
stop -command {tcl_script} <stop-id>|<stop-specification>
Use this option to execute a Tcl script (which may contain additional UCLI commands) when the breakpoint associated with id, stop-id, is triggered.
stop -halt | -continue <stop-id>|<stop-specification>
You can use this option to continue simulation even after a breakpoint is triggered. By default, all the breakpoints are in halt state (i.e., simulation stops after the breakpoint is triggered) when the breakpoint is triggered.
CALL
Use this command to call SystemVerilog class methods ( functions or tasks with no delays) and Verilog tasks, functions, and procedures from UCLI. It executes the called method or procedure. Hierarchical referencing is not allowed for method or procedure.
Note:
- This command does not advance simulation time, if you call tasks with delay. Executable statements after delay elements in the routine will not be executed and call returns to UCLI.
- Since UCLI is Tcl based, curly braces ‘{’ and ‘}’ are needed as special characters like ‘$’ are interpreted as variables in Tcl. Instead of curly braces, ‘’ (backslash) can also be used.
- Curly braces are not needed if there are no special characters.
- To use call command, you must compile your design with any debug option (-debug_pp, -debug, or -debug_all).
STOP
This command advances the simulation until a breakpoint, $stop, or $finish is encountered or the specified simulation time is reached.
Syntax
run
run [time]
run [time [unit]]
run [-absolute|relative time [unit]]
run [-line ]
run [-line [-file ]]
run [-line [-instance <i_nid>]]
run [-line ][-thread ]
run [-posedge | rising ]
run [-negedge | falling ]
run [-change | event ]
run [-delta]
run [-0]
run [-nba]
example:
ucli% run -absolute 10ps
参考文献:
- ucli_ug.pdf