8位移位寄存器和优先编码器
位移位寄存器
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity SHFT is
-- Port ( );
PORT(CLK,LOAD : IN STD_LOGIC;
QB : OUT STD_LOGIC;
DIN : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
DOUT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
end SHFT;
architecture Behavioral of SHFT is
SIGNAL REG8 : STD_LOGIC_VECTOR(7 DOWNTO 0);
begin
PROCESS (CLK,LOAD)
BEGIN
IF CLK'EVENT AND CLK = '1' THEN
IF LOAD = '1' THEN REG8 <= DIN; -- 由(LOAD = '1');装载新数据
ELSE REG8(6 DOWNTO 0) <= REG8(7 DOWNTO 1);END IF;
END IF;
END PROCESS ;
QB <= REG8(0); DOUT <= REG8;
end Behavioral;
应该注意的是,由于程序中赋值语句QB<=REG8(0)在IF语句结构外面,因此它的执行并非需要当前的时钟信号,属于异步方式,即最低位的串行输出要早于移位时钟的一个周期。
优先编码器
library IEEE;
use IEEE.STD_LOGIC_1164.AL