[systemverilog] dynamic array constraint

rand int some_dynamic_array[];

rand int unsigned SECOND_dynamic_array  [];

rand logic size_5_15;      //decide the size of the array

//constraint the value of the last element of array

constraint last_elem_c {

  some_dynamic_array[some_dynamic_array.size()-1]==5;

}

//constraint the SIZE, as you wanted of the array

constraint size{

  if(size_5_15){

     some_dynamic_array.size()==5;//size of 5 elements

  }else{

     some_dynamic_array.size()==15;    //size of 15 elements

  }

}

 constraint c_sum{

      some_dynamic_array.sum() with ( 36'(item) ) == 36'h0_0000_0028 ;

}

   //Even you can now constraint another array with the values of the previous dynamic array

constraint second_array_can_have_repeated_values_of_first_array_and_val_twenty{

  SECOND_dynamic_array  inside  { some_dynamic_array,20};

    //notice that in order to solve the SECOND array we need to first randomize the first ARRAY,therefore

  solve some_dynamic_array  before SECOND_dynamic_array;

}

 

an implicit ordering exists between generation of the size of a dynamic array and generation of that dynamic array, where the size variable is always generated first.


 

常写a[MSB:LSB] 这里的MSB和LSB都要求是常数(或常数表达式)

而如果写a[BASE -: WIDTH]或a[BASE +: WIDTH]则允许BASE改变(但WIDTH仍需为常数

 

 Ex:data[ii +:1] 等价于data[ii+1:ii]

 


bit rand_status;

rand_status = (tmp.randomize() with {

  data == local::data;

});

if(rand_status == 0)
  `uvm_fatal("RAND_ERR","tmp randomize failure!!!");

 在约束时可以使用local 来区分本地变量和class 变量,而不用把本地变量命名成和class变量名字不一样。

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