1. 2 to 1 multiplexer
module top_module(
input a, b, sel,
output out );
always @(*)
begin
case(sel)
1'b0: out=a;
1'b1: out=b;
endcase
end
endmodule
2. 2 to 1 bus multiplexer
module top_module(
input [99:0] a, b,
input sel,
output [99:0] out );
always@(*)
begin
case(sel)
1'b0: out=a;
1'b1: out=b;
endcase
end
endmodule
3. 9 to 1 multiplexer
module top_module(
input [15:0] a, b, c, d, e, f, g, h, i,
input [3:0] sel,
output [15:0] out );
always@(*)
begin
case (sel)
4'b0000:
begin
out = a;
end
4'b0001:
begin
out = b;
end
4'b0010:
begin
out = c;
end
4'b0011:
begin
out = d;
end
4'b0100:
begin
out = e;
end
4'b0101:
begin
out = f;
end
4'b0110:
begin
out = g;
end
4'b0111:
begin
out = h;
end
4'b1000:
begin
out = i;
end
default out = 16'b1111_1111_1111_1111;
endcase
end
endmodule
4. 256 to 1 multiplexer
module top_module(
input [255:0] in,
input [7:0] sel,
output out );
integer i;
always@(*)
begin
out=in[sel];
end
endmodule
5. 256 to 1 4-bit multiplexer
module top_module(
input [1023:0] in,
input [7:0] sel,
output [3:0] out );
always @(*)
begin
out={in[sel*4+3],in[sel*4+2],in[sel*4+1],in[sel*4]};
end
endmodule