Circuits--Combinational--Karnaugh

1.  3-variable

module top_module(
    input a,
    input b,
    input c,
    output out  ); 
    
    assign out=a|(c&~a)|(b&~a);

endmodule

2. 4-variable

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 
    
    assign out=((~c)&(~b))|(a&c&d)|(~a&b&c)|((~a)&b&(~c)&(~d))|((~a)&(~b)&c&(~d));

endmodule

3. 4-variable_1

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 
    
    assign out=(a)|((~a)&(~b)&c)|(b&(~c)&(~d));

endmodule

4. 4-variable_2

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 
    
    assign out=(~a&b&(~c)&(~d))|(a&(~b)&(~c)&(~d))|((~a)&(~b)&(~c)&d)|(~c&a&b&d)|(~a&b&c&d)|(~b&a&c&d)|(c&(~a)&(~b)&(~d))|(~d&a&b&c);

endmodule

5.Minimum SOP and POS

module top_module (
    input a,
    input b,
    input c,
    input d,
    output out_sop,
    output out_pos
); 

    assign out_sop=(c&d)|(~a&(~b)&(c));
    assign out_pos=~((~c|~d)&(a|b|~c));
endmodule

6. Karnaugh_1

module top_module (
    input [4:1] x, 
    output f );
    assign f=(~x[1]&x[3])|(x[2]&x[4]);

endmodule

7.Karnaugh_2

module top_module (
    input [4:1] x,
    output f
); 
    
    assign f=(~x[4]&~x[2])|(~x[1]&x[3])|(x[1]&x[2]&x[3]&x[4]);

endmodule

8.K-map

module top_module (
    input c,
    input d,
    output [3:0] mux_in
); 
    
    always@(*)
        begin
            case(c)
                1'b0:
                    case(d)
                        1'b0:
                             mux_in=4'b0100;
                        1'b1:
                           mux_in=4'b0001;
                    endcase
                    
                1'b1:
                    case(d)
                        1'b0:
                             mux_in=4'b0101;
                        1'b1:
                            mux_in=4'b1001;
                    endcase
            endcase
        end

endmodule