Vivado编译报错:[Place 30-574] Poor placement for routing between an IO pin and BUFG. If this sub optimal condition is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE constraint in the .xdc file to demote this message to a WARNING. However, the use of this override is highly discouraged. These examples can be used directly in the .xdc file to override this clock rule.
解决方法1:模块使用了普通IO作为时钟,此时默认编译不通过,需要检查信号
解决方法2:使用约束忽略报错,但可靠性降低
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets YOUR_NET_NAME]