文章目录
一、基本准备
二、Verilog代码部分
因为我们是自定义ip，所以需要知道avalon总线协议，因为SoC FPGA是AXI总线与avalon总线自动转换的，所以我们需要接口对上avalon的接口
1.pwm_avalon_port.v
module pwm_avalon_port(
input clk,
input rst_n,
// avalon mm slave
input as_chipselect,
input [1:0] as_address,
input as_write,
input [31:0] as_writedata,
output reg [31:0] as_readdata,
// o_pwm
output o_pwm
);
reg [31:0] counter_arr;// 预装载值控制频率
reg [31:0] counter_ccr;// 预比较值控制占空比
reg control;// 控制寄存器
// 预装载值
always @(posedge clk or negedge rst_n)begin
if(!rst_n)begin
counter_arr <= 32'b0;
end
else if(as_chipselect && as_write && (as_address == 0))begin
counter_arr <= as_writedata;
end
else begin
counter_arr <= counter_arr;
end
end
// 预比较值
always @(posedge clk or negedge rst_n)begin
if(!rst_n)begin
counter_ccr <= 32'b0;
end
else if(as_chipselect && as_write && (as_address == 1))begin
counter_ccr <= as_writedata;
end
else begin
counter_ccr <= counter_ccr;
end
end
// control 控制寄存器
always @(posedge clk or negedge rst_n)begin
if(!rst_n)begin
control <= 0;
end
else if(as_chipselect && as_write && (as_address == 2))begin
control <= as_writedata[0];
end
else begin
control <= control;
end
end
// as_readdata 读寄存器
always @(posedge clk or negedge rst_n)begin
if(!rst_n)begin
as_readdata <= 0;
end
else if(as_chipselect)begin
case (as_address)
0 : as_readdata <= counter_arr;
1 : as_readdata <= counter_ccr;
2 : as_readdata <= control;
default : as_readdata <= 0;
endcase
end
end
pwm_logic u_pwm_logic(
/* input */.clk (clk ),
/* input */.rst_n (rst_n ),
/* input */.cnt_en (control ),// 计数器使能
/* input [31:0] */.counter_arr (counter_arr),// 预装载值
/* input [31:0] */.counter_ccr (counter_ccr),// 预比较值
/* output reg */.o_pwm (o_pwm )
);
endmodule
2.pwm_logic.v
module pwm_logic(
input clk ,
input rst_n ,
input cnt_en ,// 计数器使能
input [31:0] counter_arr ,// 预装载值
input [31:0] counter_ccr ,// 预比较值
output reg o_pwm
);
reg [31:0] cnt;
wire add_cnt;
wire end_cnt;
reg [31:0] counter_ccr_r;
always @(posedge clk or negedge rst_n)begin
if(!rst_n)begin
cnt <= 0;
end
else if(add_cnt)begin
if(end_cnt)begin
cnt <= 0;
end
else begin
cnt <= cnt + 1;
end
end
else begin
cnt <= cnt;
end
end
assign add_cnt = cnt_en;
assign end_cnt = add_cnt && cnt == counter_arr - 1;
// 寄存器存值
always @(posedge clk)begin
if(!cnt)begin
counter_ccr_r <= counter_ccr;
end
else begin
counter_ccr_r <= counter_ccr_r;
end
end
// 输出
always @(posedge clk or negedge rst_n)begin
if(!rst_n)begin
o_pwm <= 1'b0;
end
else if(counter_ccr_r >= cnt)begin
o_pwm <= 1'b0;
end
else if(counter_ccr_r < cnt)begin
o_pwm <= 1'b1;
end
else begin
o_pwm <= o_pwm;
end
end
endmodule
三、自定义ip设置
1.新建一个ip
将Verilog文件放入到ip核中
对信号和接口进行修改一下，
管道输出pwm
复位信号
四、黄金工程代码修改
wire pwm;
assign LED = {4{pwm}};
// pwm
.pwm_conduit_wire (pwm) // pwm_conduit.wire
完整代码
module C5MB_top(
/ FPGA /
input FPGA_CLK1_50,
/ HPS /
output [14: 0] HPS_DDR3_ADDR,
output [ 2: 0] HPS_DDR3_BA,
output HPS_DDR3_CAS_n,
output [ 0: 0] HPS_DDR3_CKE,
output HPS_DDR3_CK_n,
output HPS_DDR3_CK_p,
output [ 0: 0] HPS_DDR3_CS_n,
output [ 3: 0] HPS_DDR3_DM,
inout [31: 0] HPS_DDR3_DQ,
inout [ 3: 0] HPS_DDR3_DQS_n,
inout [ 3: 0] HPS_DDR3_DQS_p,
output [ 0: 0] HPS_DDR3_ODT,
output HPS_DDR3_RAS_n,
output HPS_DDR3_RESET_n,
input HPS_DDR3_RZQ,
output HPS_DDR3_WE_n,
output HPS_ENET_GTX_CLK,
inout HPS_ENET_INT_n, //hps_gpio_GPIO35
output HPS_ENET_MDC,
inout HPS_ENET_MDIO,
input HPS_ENET_RX_CLK,
input [ 3: 0] HPS_ENET_RX_DATA,
input HPS_ENET_RX_DV,
output [ 3: 0] HPS_ENET_TX_DATA,
output HPS_ENET_TX_EN,
inout HPS_EMMC_SEL, //hps_io_gpio_inst_GPIO44
output HPS_SDMMC_CLK,
inout HPS_SDMMC_CMD,
inout [ 7: 0] HPS_SDMMC_DATA,
output HPS_EMMC_RST_n,
input HPS_UART_RX,
output HPS_UART_TX,
//## HPS_USB ##
input HPS_USB_CLKOUT,
inout [ 7: 0] HPS_USB_DATA,
input HPS_USB_DIR,
input HPS_USB_NXT,
output HPS_USB_STP,
output [ 3: 0] LED
// input [ 1: 0] KEY
);
//=======================================================
// REG/WIRE declarations
//=======================================================
wire hps_fpga_reset_n;
wire fpga_clk_50;
wire fpga_clk_100;
wire pwm;
assign LED = {4{pwm}};
pll pll_inst (
.refclk (FPGA_CLK1_50), // refclk.clk
.rst (~hps_fpga_reset_n), // reset.reset
.outclk_0 (fpga_clk_50), // outclk0.clk
.outclk_1 (fpga_clk_100)
);
//=======================================================
// Structural coding
//=======================================================
soc_system u0 (
.clk_clk (fpga_clk_50), // clk.clk
.reset_reset_n (hps_fpga_reset_n), // reset.reset_n
//HPS ddr3
.memory_mem_a (HPS_DDR3_ADDR), // memory.mem_a
.memory_mem_ba (HPS_DDR3_BA), // .mem_ba
.memory_mem_ck (HPS_DDR3_CK_p), // .mem_ck
.memory_mem_ck_n (HPS_DDR3_CK_n), // .mem_ck_n
.memory_mem_cke (HPS_DDR3_CKE), // .mem_cke
.memory_mem_cs_n (HPS_DDR3_CS_n), // .mem_cs_n
.memory_mem_ras_n (HPS_DDR3_RAS_n), // .mem_ras_n
.memory_mem_cas_n (HPS_DDR3_CAS_n), // .mem_cas_n
.memory_mem_we_n (HPS_DDR3_WE_n), // .mem_we_n
.memory_mem_reset_n (HPS_DDR3_RESET_n), // .mem_reset_n
.memory_mem_dq (HPS_DDR3_DQ), // .mem_dq
.memory_mem_dqs (HPS_DDR3_DQS_p), // .mem_dqs
.memory_mem_dqs_n (HPS_DDR3_DQS_n), // .mem_dqs_n
.memory_mem_odt (HPS_DDR3_ODT), // .mem_odt
.memory_mem_dm (HPS_DDR3_DM), // .mem_dm
.memory_oct_rzqin (HPS_DDR3_RZQ), // .oct_rzqin
//HPS ethernet
.hps_0_hps_io_hps_io_emac1_inst_TX_CLK (HPS_ENET_GTX_CLK), // hps_0_hps_io.hps_io_emac1_inst_TX_CLK
.hps_0_hps_io_hps_io_emac1_inst_TXD0 (HPS_ENET_TX_DATA[0]), // .hps_io_emac1_inst_TXD0
.hps_0_hps_io_hps_io_emac1_inst_TXD1 (HPS_ENET_TX_DATA[1]), // .hps_io_emac1_inst_TXD1
.hps_0_hps_io_hps_io_emac1_inst_TXD2 (HPS_ENET_TX_DATA[2]), // .hps_io_emac1_inst_TXD2
.hps_0_hps_io_hps_io_emac1_inst_TXD3 (HPS_ENET_TX_DATA[3]), // .hps_io_emac1_inst_TXD3
.hps_0_hps_io_hps_io_emac1_inst_RXD0 (HPS_ENET_RX_DATA[0]), // .hps_io_emac1_inst_RXD0
.hps_0_hps_io_hps_io_emac1_inst_MDIO (HPS_ENET_MDIO), // .hps_io_emac1_inst_MDIO
.hps_0_hps_io_hps_io_emac1_inst_MDC (HPS_ENET_MDC), // .hps_io_emac1_inst_MDC
.hps_0_hps_io_hps_io_emac1_inst_RX_CTL (HPS_ENET_RX_DV), // .hps_io_emac1_inst_RX_CTL
.hps_0_hps_io_hps_io_emac1_inst_TX_CTL (HPS_ENET_TX_EN), // .hps_io_emac1_inst_TX_CTL
.hps_0_hps_io_hps_io_emac1_inst_RX_CLK (HPS_ENET_RX_CLK), // .hps_io_emac1_inst_RX_CLK
.hps_0_hps_io_hps_io_emac1_inst_RXD1 (HPS_ENET_RX_DATA[1]), // .hps_io_emac1_inst_RXD1
.hps_0_hps_io_hps_io_emac1_inst_RXD2 (HPS_ENET_RX_DATA[2]), // .hps_io_emac1_inst_RXD2
.hps_0_hps_io_hps_io_emac1_inst_RXD3 (HPS_ENET_RX_DATA[3]), // .hps_io_emac1_inst_RXD3
//HPS SD card
.hps_0_hps_io_hps_io_sdio_inst_CMD (HPS_SDMMC_CMD), // .hps_io_sdio_inst_CMD
.hps_0_hps_io_hps_io_sdio_inst_D0 (HPS_SDMMC_DATA[0]), // .hps_io_sdio_inst_D0
.hps_0_hps_io_hps_io_sdio_inst_D1 (HPS_SDMMC_DATA[1]), // .hps_io_sdio_inst_D1
.hps_0_hps_io_hps_io_sdio_inst_CLK (HPS_SDMMC_CLK), // .hps_io_sdio_inst_CLK
.hps_0_hps_io_hps_io_sdio_inst_D2 (HPS_SDMMC_DATA[2]), // .hps_io_sdio_inst_D2
.hps_0_hps_io_hps_io_sdio_inst_D3 (HPS_SDMMC_DATA[3]), // .hps_io_sdio_inst_D3
.hps_0_hps_io_hps_io_sdio_inst_D4 (HPS_SDMMC_DATA[4]), // .hps_io_sdio_inst_D4
.hps_0_hps_io_hps_io_sdio_inst_D5 (HPS_SDMMC_DATA[5]), // .hps_io_sdio_inst_D5
.hps_0_hps_io_hps_io_sdio_inst_D6 (HPS_SDMMC_DATA[6]), // .hps_io_sdio_inst_D6
.hps_0_hps_io_hps_io_sdio_inst_D7 (HPS_SDMMC_DATA[7]), // .hps_io_sdio_inst_D7
.hps_0_hps_io_hps_io_sdio_inst_PWREN (HPS_EMMC_RST_n), // .hps_io_sdio_inst_PWREN
//HPS USB
.hps_0_hps_io_hps_io_usb1_inst_D0 (HPS_USB_DATA[0]), // .hps_io_usb1_inst_D0
.hps_0_hps_io_hps_io_usb1_inst_D1 (HPS_USB_DATA[1]), // .hps_io_usb1_inst_D1
.hps_0_hps_io_hps_io_usb1_inst_D2 (HPS_USB_DATA[2]), // .hps_io_usb1_inst_D2
.hps_0_hps_io_hps_io_usb1_inst_D3 (HPS_USB_DATA[3]), // .hps_io_usb1_inst_D3
.hps_0_hps_io_hps_io_usb1_inst_D4 (HPS_USB_DATA[4]), // .hps_io_usb1_inst_D4
.hps_0_hps_io_hps_io_usb1_inst_D5 (HPS_USB_DATA[5]), // .hps_io_usb1_inst_D5
.hps_0_hps_io_hps_io_usb1_inst_D6 (HPS_USB_DATA[6]), // .hps_io_usb1_inst_D6
.hps_0_hps_io_hps_io_usb1_inst_D7 (HPS_USB_DATA[7]), // .hps_io_usb1_inst_D7
.hps_0_hps_io_hps_io_usb1_inst_CLK (HPS_USB_CLKOUT), // .hps_io_usb1_inst_CLK
.hps_0_hps_io_hps_io_usb1_inst_STP (HPS_USB_STP), // .hps_io_usb1_inst_STP
.hps_0_hps_io_hps_io_usb1_inst_DIR (HPS_USB_DIR), // .hps_io_usb1_inst_DIR
.hps_0_hps_io_hps_io_usb1_inst_NXT (HPS_USB_NXT), // .hps_io_usb1_inst_NXT
//HPS UART
.hps_0_hps_io_hps_io_uart0_inst_RX (HPS_UART_RX), // .hps_io_uart0_inst_RX
.hps_0_hps_io_hps_io_uart0_inst_TX (HPS_UART_TX), // .hps_io_uart0_inst_TX
.hps_0_hps_io_hps_io_gpio_inst_GPIO35 (HPS_ENET_INT_n), // .hps_io_gpio_inst_GPIO35
.hps_0_hps_io_hps_io_gpio_inst_GPIO44 (HPS_EMMC_SEL), // .hps_io_gpio_inst_GPIO44
.hps_0_h2f_reset_reset_n (hps_fpga_reset_n), // hps_0_h2f_reset.reset_n
.hps_0_f2h_cold_reset_req_reset_n (1'b1), // hps_0_f2h_cold_reset_req.reset_n
.hps_0_f2h_debug_reset_req_reset_n (1'b1), // hps_0_f2h_debug_reset_req.reset_n
.hps_0_f2h_warm_reset_req_reset_n (1'b1), // hps_0_f2h_warm_reset_req.reset_n
// pio_led
// .pio_led_external_connection_export (LED), // pio_led_external_connection.export
// pio_key
// .pio_key_external_connection_export (KEY) // pio_key_external_connection.export
// pwm
.pwm_conduit_wire (pwm) // pwm_conduit.wire
);
endmodule
五、C语言实现
编写C语言代码
//gcc标准头文件
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
//HPS厂家提供的底层定义头文件
#define soc_cv_av //开发平台Cyclone V 系列
#include "hwlib.h"
#include "socal/socal.h"
#include "socal/hps.h"
//与用户具体的HPS 应用系统相关的硬件描述头文件
#include "hps_0.h"
#define HW_REGS_BASE (ALT_STM_OFST) //HPS外设地址段基地址
#define HW_REGS_SPAN (0x04000000) //HPS外设地址段地址空间 64MB大小
#define HW_REGS_MASK (HW_REGS_SPAN - 1) //HPS外设地址段地址掩码
static volatile unsigned long *my_pwm = NULL;
//fpga初始化
int fpga_init(int *virtual_base)
{
int fd;
void *perph_virtual_base;
//1.open打开mmu
fd = open("/dev/mem",(O_RDWR | O_SYNC));
if(fd == -1)
{
printf("open failed..\n");
exit(1);
}
//mmap 映射虚拟地址
perph_virtual_base = mmap(NULL,HW_REGS_SPAN, ( PROT_READ | PROT_WRITE ),MAP_SHARED,fd,HW_REGS_BASE);
if(perph_virtual_base == MAP_SHARED)
{
printf("mmap() is failed..\n");
return 1;
}
//接口
my_pwm = perph_virtual_base + ((unsigned long)(ALT_LWFPGASLVS_OFST + PWM_BASE) & (unsigned long)(HW_REGS_MASK));
//保存虚拟地址
*virtual_base = perph_virtual_base;
return fd;
}
int main()
{
int virtual_base;
int fd;
fd = fpga_init(&virtual_base);
int tmp = -0xffff;
//打开使能
*(my_pwm + 2) = 0x1;
*(my_pwm + 0) = 65536;// 65536
while(1)
{
tmp = tmp + 10;
if(tmp > 65536)
{
tmp = -65536;
}
else if(tmp > 0)
{
*(my_pwm + 1) = tmp;
}
else
{
*(my_pwm + 1) = -tmp;
}
usleep(150);
}
//取消地址映射
if(munmap(virtual_base,HW_REGS_SPAN) != 0)
{
printf("munmap() is failed..\n");
close(fd);
return 1;
}
close(fd);
return 0;
}
六、执行效果
这里不方便拍摄效果，就是呼吸灯的效果
七、总结
跟着老师一步一步的，有些不太懂
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