systemverilog fork join 多线程, 是否对于eda simulation仿真速度有提升

编译工具: vcs script version : I-2014.03

编译指令: vcs -sverilog -R xxxx.v

结论: fork join 这样的并发优化, 编译器, 默认是有的. 无需人工干预. 优化性能, 应该从代码动作少做到精简, 且风格便于维护. 

如果真的需要优化, 尽量少写for 循环, 使用while wait 等方式, 交给编译器更多的自主权. 

 

1. 使用perl 生成一个 400M 左右的文本文件.

 open(FH, ">aa.txt") or die $!; 
for(1..30000000){
 print FH "$_\n";
 }
 close(FH);
 

 2. 使用verilog 的语法scan, 无fork join, 测试了, 打开$display 和 无$display 的情况, 

module read_write_file();
	integer fp_r,fp_w;
	integer count;
	bit [31:0] reg1;
 
	initial
		begin
			fp_r=$fopen("aa.txt","r");//以读的方式打开文件
			fp_w=$fopen("data_out.txt","w");//以写的方式打开文件
 
			while(! $feof(fp_r))
				begin
					count=$fscanf(fp_r,"%d" ,reg1) ;//每次读一行
					//$display("%d::::%d",count,reg1) ;//打印输出
					$fwrite(fp_w,"%d\n",reg1) ;//写入文件
				end
 
			$fclose(fp_r);//关闭已打开的文件
			$fclose(fp_w);
		end
endmodule

//with display
//CPU Time:    106.280 seconds;       Data structure size:   0.0Mb
//Sat Sep  7 15:06:04 2019
//CPU time: 1.466 seconds to compile + .880 seconds to elab + .134 seconds to link + 161.698 seconds in simulation

//without display
//CPU Time:     33.690 seconds;       Data structure size:   0.0Mb
//Sat Sep  7 15:09:23 2019
//CPU time: .937 seconds to compile + .938 seconds to elab + .159 seconds to link + 36.309 seconds in simulation

 3. 带fork join, 测试了, 打开$display 和 无$display 的情况.   

        在2中的代码, 只增加q 不用fork join, 确实有一定的消耗.

       后续使用fork join , 仿真消耗时间, 有所降低. 

module read_write_file();
	integer fp_r,fp_w;
	integer count;
	bit [31:0] reg1_q[$];
    bit [31:0] tmp;
 
	initial
		begin
			fp_r=$fopen("aa.txt","r");//以读的方式打开文件
			fp_w=$fopen("data_out.txt","w");//以写的方式打开文件
 
            fork
                while(! $feof(fp_r)) begin
                        count=$fscanf(fp_r,"%d" ,tmp) ;//每次读一行
                        //$display("%d::::%d",count,tmp) ;//打印输出
                        reg1_q.push_back(tmp);
                    end

                while(reg1_q.size > 0) begin
                    $fwrite(fp_w,"%d\n",reg1_q.pop_front()) ;//写入文件
                end
            join
 
			$fclose(fp_r);//关闭已打开的文件
			$fclose(fp_w);
		end
endmodule


//run cmd: vcs -R pal_wr.v -sverilog

//only add q.  q cost
//CPU Time:    110.070 seconds;       Data structure size:   0.0Mb
//Sat Sep  7 15:30:30 2019
//CPU time: .950 seconds to compile + .887 seconds to elab + .189 seconds to link + 174.258 seconds in simulation

//use q , fork join with display
//CPU Time:    105.130 seconds;       Data structure size:   0.0Mb
//Sat Sep  7 15:43:03 2019
//CPU time: 1.003 seconds to compile + .865 seconds to elab + .211 seconds to link + 154.774 seconds in simulation

//use q , fork join without  display
//CPU Time:     33.760 seconds;       Data structure size:   0.0Mb
//Sat Sep  7 15:46:35 2019
//CPU time: .950 seconds to compile + .853 seconds to elab + .184 seconds to link + 35.666 seconds in simulation