HDLBits笔记6:Circuits.Combinational Logic.Multiplexers + Arithmetic Circuits

Multiplexers

2-to-1 multiplexer

module top_module( 
    input a, b, sel,
    output out ); 
    assign out = sel ? b : a;
endmodule

2-to-1 bus multiplexer

module top_module( 
    input [99:0] a, b,
    input sel,
    output [99:0] out );
    assign out = sel ? b : a;
endmodule

9-to-1 multiplexer

建立一个16bit位宽的9选1多路选择器，sel=0选择a，以此类推，其他情况输出全1

module top_module( 
    input [15:0] a, b, c, d, e, f, g, h, i,
    input [3:0] sel,
    output [15:0] out );
    always @(*) begin
        case(sel)
            4'h0: out = a;
            4'h1: out = b;
            4'h2: out = c;
            4'h3: out = d;
            4'h4: out = e;
            4'h5: out = f;
            4'h6: out = g;
            4'h7: out = h;
            4'h8: out = i;
            default: out = 16'hffff;
        endcase
    end
endmodule

256-to-1 multiplexer

建立一个256选1多路选择器，输入打包成一个256bit向量形式，sel=0选择in[0]，以此类推

module top_module( 
    input [255:0] in,
    input [7:0] sel,
    output out );
    assign out = in[sel];
endmodule

256-to-1 4bit multiplexer

建立一个4bit位宽的256选1多路选择器，输入打包成一个1024bit向量形式，sel=0选择in[3:0]，以此类推

module top_module( 
    input [1023:0] in,
    input [7:0] sel,
    output [3:0] out );
    assign out = in[sel*4 +: 4];
endmodule

Arithmetic Circuits

Half adder

建立一个半加器，没有cin

module top_module( 
    input a, b,
    output cout, sum );
    assign cout = a & b;
    assign sum = a ^ b;
endmodule

Full adder

建立一个全加器，有cin

module top_module( 
    input a, b, cin,
    output cout, sum );
    assign cout = (a & b) | (b & cin) | (a & cin);
    assign sum = a ^ b ^ cin;
endmodule

3-bit binary adder

实例化3个全加器，建立一个3-bit行波进位加法器

module top_module( 
    input [2:0] a, b,
    input cin,
    output [2:0] cout,
    output [2:0] sum );
    fadd u1(a[0], b[0], cin, cout[0], sum[0]);
    fadd u2(a[1], b[1], cout[0], cout[1], sum[1]);
    fadd u3(a[2], b[2], cout[1], cout[2], sum[2]);
endmodule

module fadd(
    input a, b, cin,
    output cout, sum
);
    assign cout = (a & b) | (b & cin) | (cin & a);
    assign sum = a ^ b ^ cin;
endmodule

Adder

实现如下电路：

方法一：根据RTL图，实例化4个全加器

module top_module (
    input [3:0] x,
    input [3:0] y, 
    output [4:0] sum);
    wire [2:0] cout;
    fadd u0(x[0], y[0],    1'b0, cout[0], sum[0]);
    fadd u1(x[1], y[1], cout[0], cout[1], sum[1]);
    fadd u2(x[2], y[2], cout[1], cout[2], sum[2]);
    fadd u3(x[3], y[3], cout[2],  sum[4], sum[3]);
endmodule

module fadd(
    input a, b, cin,
    output cout, sum
);
    assign cout = (a & b) | (b & cin) | (cin & a);
    assign sum = a ^ b ^ cin;
endmodule

方法二：使用+操作符

module top_module (
    input [3:0] x,
    input [3:0] y,
    output [4:0] sum
);
    assign sum = x+y;
endmodule

Signed addition overflow

将两个8-bit的二进制补码a[7:0]和b[7:0]相加产生s[7:0]，并计算是否有符号位溢出

符号位溢出：两个正数相加得到负数、两个负数相加得到正数

module top_module (
    input [7:0] a,
    input [7:0] b,
    output [7:0] s,
    output overflow
);
    assign s = a + b;
    assign overflow = (~a[7] & ~b[7] & s[7]) | (a[7] & b[7] & ~s[7]);
endmodule

100-bit binary adder

建立一个100-bit的二进制加法器，将两个100-bit的数和cin相加得到100-bit的sum和cout

module top_module( 
    input [99:0] a, b,
    input cin,
    output cout,
    output [99:0] sum );
    assign {cout, sum} = a + b + cin;
endmodule

4-digit BCD adder

提供一个BCD全加器bcd_fadd，其将两个BCD码和cin相加，输出sum和cout，其模块端口如下：

module bcd_fadd (
    input [3:0] a,
    input [3:0] b,
    input     cin,
    output   cout,
    output [3:0] sum );

实例化4个bcd_fadd来建立一个4位数的BCD行波进位加法器，你的加法器要能将两个4位数的BCD数字(16bit位宽)和一个cin相加得到四位数的sum和cout

module top_module ( 
    input [15:0] a, b,
    input cin,
    output cout,
    output [15:0] sum );
    wire [2:0] _cout;
    bcd_fadd u0(a[3:0],     b[3:0],      cin, _cout[0], sum[3:0]);
    bcd_fadd u1(a[7:4],     b[7:4], _cout[0], _cout[1], sum[7:4]);
    bcd_fadd u2(a[11:8],   b[11:8], _cout[1], _cout[2], sum[11:8]);
    bcd_fadd u3(a[15:12], b[15:12], _cout[2],     cout, sum[15:12]);
endmodule