VCS-Ucli命令行

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最新推荐文章于 2024-05-30 17:44:48 发布

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分类专栏：学习笔记文章标签： VCS Debug

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VCS-Ucli%命令行

abort : Abort evaluation of a macro file.
ace : Evaluate analog simulator command.
alias : Create an alias for a command.
assertion : Assertion(SVA/PSL) related commands.
call : Execute a Verilog system task/function, a Verilog PLI task/function, or a VHDL foreign procedure.
cbug : Debugging support for C,C++ and SystemC source files
checkpoint : Checkpoints/Joins the simulating design at the current/given time.
config : Display/set current settings for configuration variables.
constraints : Display design information,disable/enable/add constraints,or extract testcase(s) for constraints debug.
coverage : Evaluate coverage command(s).
do : Evaluate a TCL(macro) script; Superset of ‘source’ TCL command.
drivers : Obtain driver information for a signal/variable.
dump : Create/manipute/close dump value change file information.

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