This is a Moore state machine with two states, one input, and one output. Implement this state machine. Notice that the reset state is B.
This exercise is the same as fsm1s, but using asynchronous reset.
前言
三个输入,包括一个时钟clk,一个高电平有效的异步置位信号areset,一个输入信号in;一个输出信号out。
代码
module top_module(
input clk,
input areset,
input in,
output out);
parameter A=0