HDLBits Countbcd

HDLBits Countbcd

网址：https://hdlbits.01xz.net/wiki/Countbcd

Build a 4-digit BCD (binary-coded decimal) counter. Each decimal digit is encoded using 4 bits: q[3:0] is the ones digit, q[7:4] is the tens digit, etc. For digits [3:1], also output an enable signal indicating when each of the upper three digits should be incremented.

You may want to instantiate or modify some one-digit decade counters.

根据题目和波形得知，需要构成一个0-9999的计数器，构建countbcd子模块。

module countbcd(
	input clk,
    input reset,
    input ena,
    output [3:0] q
);
    always @(posedge clk) begin
        if(reset) q<=4'b0;
        else if(ena) begin
            if(q==4'd9) q<=4'd0;
            else q<=q+4'b1;
        end
        else q<=q;
    end
endmodule

顶层模块为

module top_module (
    input clk,
    input reset,   // Synchronous active-high reset
    output [3:1] ena,
    output [15:0] q);
    wire [3:0] q0,q1,q2,q3;
    assign ena[1]=(q0==4'd9)?1:0;
    assign ena[2]=(q0==4'd9&&q1==4'd9)?1:0;
    assign ena[3]=(q0==4'd9&&q1==4'd9&&q2==4'd9)?1:0;
    countbcd cntbcd0(clk,reset,1'b1,q0);
    countbcd cntbcd1(clk,reset,ena[1],q1);
    countbcd cntbcd2(clk,reset,ena[2],q2);
    countbcd cntbcd3(clk,reset,ena[3],q3);
    assign q={q3,q2,q1,q0};
endmodule