terms definition in power analysis

terms definition

Activity means the probability of a particular net in design switching from 0 ->1 or 1 -> 0 in one clock cycle.（一个周期内翻转的次数，上图的activity为2/5）

Duty Cycle means the probability that a signal net has the value of 1. For instance, if signal of a net is 1 for 2ns in the total simulation time of 10ns, then duty cycle of the net is 0.2. The duty cycle of the signal in the previous diagram is 0.5 (2.5/5). However, if a signal is Z or X for some time and 0 for the rest of time, then duty cycle of signal is 0. （一段时间内，值为1的占比，上图假设周期为1ns，duty cycle为2.5/5）

Transition Density means number of times signal toggle from 0->1 or 1->0 in 1 second. For the previous diagram and assuming one clock cycle is 4ns, then Transition Density = 1e+08 (2/20ns)（1s内，翻转次数，假设上图周期为4ns，2/20ns）

3个同级的概念，针对值为1的概率的不同的描述方式。

以and logic为例， toggle rate 的传播：

I1	I2	O
0	0	0
0	1	0
1	0	0
1	1	1

static power

1 leakage power：related to the status of device and power. In library, leakage power is different with each other in different status.

2 internal power: passive_power_template_8x1 is input transition;

D(A) and D(B) is transition density of input pin A & B. D(Y) is transition density of output pin.

3 switching power

Switching power is calculated using the basic equation:
SwitchingPower = CAV^2F
Where:
C = Loading net capacitance (SPEF/DSPF or a default load value)
V = Voltage
A = Nodal activity
F = Operating frequency
The product of "A*F" is the transition density (D) calculated during the activity propagation
inside the power engine. Since the calculated transition density includes both rising and
falling transitions, the equation is modified for a given power rail as:
SwitchingPower = 1/2CV^2D

check in pgv

static analysis: use activity to calculate leakage power, switching power, internal power

Static analysis accurately highlights IR drop and electromigration problems caused by issues such as open circuits in the power rails, missing vias or via arrays, high current and high current densities, lack of power straps, and insufficient power routing widths. Static analysis is best used early in the flow and validation process to detect and correct major supply grid problems.

method of static analysis:

1 Vector-based Average Power Calculation:

The vector-driven approach uses the VCD or TCF output of a logic simulator to obtain the number of transitions for each net. The power engine calculates the number of transitions from 0<->1, 0/1<->X and 0/1<->Z.

The 0<->1 transition is counted as 1 by default

The 0/1 <-> X transitions are counted as 0.5 by default 

The 0/1<->Z transitions are counted as 0.25 by default.

You can use -x_transition_factor and -z_transition_factor options of set_power_analysis_mode command for changing the default value of 0/1<->X or 0/1 <->Z transitions. The power engine also calculates the duty cycle of each net for state dependent internal or leakage power calculation as described previously.

cell class:

combinational cell: The power engine gets function of combinational cell from .lib and uses the function to propagate activity through combinational cells.

sequential cell:  Therefore it is recommended to provide activity at outputs of sequential cells. With the power engine you can use either the set_default_switching_activity command to specify the average activity on sequential cells or use RTL, VCD, or TCF for seeding activity at sequential cells.

macro: it is recommended that users specify activity at the read and write signals of macros.

clock network and clock gate: For accurate propagation through clock network it is important that users specify the TWF file which has clock frequency of generated clocks as well.

2 Propagation-based Average Power Calculation

The power engine calculates the switching probability, as well as static state probability, of each net in the design. The propagation based approach is vector-independent and provides coverage for all nets in a design.

method to set activity:

check in static analysis:

1 IR Drop: average voltage drop

2 EM:caused by the movement of metal atoms in a wire because of high current stress(high current densities).

        1)AC Signal ElectroMigration: wire self-heating.Wire self-heating or Joule Heating describes a phenomenon where high AC currents flowing through the resistive interconnects causes extreme temperature

        2)DC Signal ElectroMigration: Hot-carrier injection or DC signal electromigration can occur whenever a transistor switches. The most common problem occurs when there is a slow output transition with a large output capacitance which would mean a high Vds for a long time with a high Vgs and Ids.

        3)VDD power em

        4)VSS power em

check: short, missing_net, skipped_net,

3 resistance analysis:

         1)grid resistance(res): power grid weakness and resistance hot spots without activity vector coverage.

        2)instance resistance(rlrp): it is plotted for the instances connected to the power-grid. The resistance for the instance pin is calculated as total resistance along the least resistance path. If an instance has multiple power pins connected to the power-grid, instance based rlrp plot uses the pin with the worst (highest) resistance value to plot the instance based data.

        3)resistor current(rc): create the IR drop plot generated

        4)tap current(tc): the tap current plot shows the current distribution inside the cell.

        5)current density(rj): Current density reporting does not plot the current density of the segment but it is based on the ratio of wire current density over the current density limit that is allowed by the process - (J/Jmax).

        6)instance voltage drop(net-based)(ivdn): The IRdrop plot displays the net-based instance voltage drop. ivdn shows the worst instance voltage drop for each net.

        7)instance voltage drop(domain-based)(ivdd): ivdd will show the worst instance voltage drop for each power-ground pair.

        8)power-gate current(I/Idsat)(pi): The power-gate current (I/Idsat) plot displays the ratio of current through the power-gate and the saturation current (Idsat).

        9)power-gate voltage(pv): The power-gate voltage plot displays the IRdrop across power-switch instances.

        10)resistor sensitiviy analysis(rs): The sensitivity analysis can be used as guidance for powergrid
optimization. resistor sensitivity:

Sensitivity is calculated for all powergrid segments and the resistors with higher sensitivity
when optimized have better chance to improve overall IRdrop profile of the power-grid.

 

dynamic max (transient analysis)

1 dynamic power

Dynamic power-consumption calculation is a method of analyzing a circuit to obtain operating currents and voltages. It is time-based, analyzing the circuit netlist over a specified period, such as a clock cycle.

2 The vector-driven approach

The VCD file is the output from a gate-level simulation of many vectors and contains all the net switching activity information for the design. The VCD simulation approach to dynamic power-consumption calculation uses the same VCD file as that used for static powerconsumption calculation, but unlike the static VCD approach, it uses the information on the switching instances and when they switch.

3 The vectorless approach

1) Probability-Based Vectorless Methodology

Uses timing arrival window information from a static timing analysis tool to determine when instances switch.

The power calculator will generate a virtual worst-case power vector.

The power calculator will schedule cell's transition time to twf file.

The program uses output load and slew to create a weighted average current profile for the instance based on power arcs defined in .lib for the cell.

The calculated current waveforms are then fed to dynamic rail analysis engine to perform dynamic IRdrop analysis.

2) State-Propagation-Based Vectorless Methodology

The state-propagation-based dynamic analysis generates a switching scenario file (voltus_power.stateprop.switchsrc) that contains the switching information of flipflops.

4 peak current

5 IR drop：无论是dynamic IR，还是static IR都是通过power进行计算。

        P=UI；I=P/U；I*power net R即为所需计算IR drop。

TWF file

给出了每个instance 翻转信息。pgv library给出每个cell的波形。工具会取一定的timing window计算全芯片power。选取最大的power的timing window，来查看每个cell在这个timing window的peak current。peak current*R即为每个cell所需计算的dynamic IR。

References:

[1]voltus UG