【HDLBits刷题】Adder3.

最新推荐文章于 2024-05-22 14:47:27 发布

李十一11

最新推荐文章于 2024-05-22 14:47:27 发布

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分类专栏： HDLBits刷题 Verilog 文章标签： fpga开发

本文链接：https://blog.csdn.net/qq_22774445/article/details/124238954

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Now that you know how to build a full adder, make 3 instances of it to create a 3-bit binary ripple-carry adder. The adder adds two 3-bit numbers and a carry-in to produce a 3-bit sum and carry out. To encourage you to actually instantiate full adders, also output the carry-out from each full adder in the ripple-carry adder. cout[2] is the final carry-out from the last full adder, and is the carry-out you usually see.

1、第一种，抽象方法实现：

module top_module( 
    input [2:0] a, b,
    input cin,
    output [2:0] cout,
    output [2:0] sum );
    assign sum = a^b^{cout[1:0],cin};
    assign cout[0] =  a[0]&b[0] | a[0]&cin | b[0]&cin;
    always@(*)begin
        integer i;
        for(i=1;i<3;i=i+1)begin
            cout[i] =  a[i]&b[i] | a[i]&cout[i-1] | b[i]&cout[i-1];
        end
    end
endmodule