vivado XDC / ISE UCF 约束文件

1、CLOCK_DEDICATED_ROUTE（不打算使用板子上的晶振）

vivado XDC：set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets XXX]
                       set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {clk_wiz_0/inst/clk_in1_clk_wiz_0}]

ISE UCF：PIN "inst_clkgen/clkout1_buf.O" CLOCK_DEDICATED_ROUTE = FALSE;

2、IOSTANDARD

vivado XDC：set_property -dict{PACKAGE_PIN AD9 IOSTANDARD DIFF_HSTL_II_18} [get_ports Rcvclk_pll_N];

ISE UCF：NET "Rcvclk_pll_N" IOSTANDARD = DIFF_HSTL_II_18 | LOC = AD9;

2、DIFF_TERM

vivado XDC：set_property -dict{PACKAGE_PIN AB11 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports CLK_184M_P]

ISE UCF：NET "ADC2_DAB_N" IOSTANDARD = LVDS | LOC = AB4 | DIFF_TERM=TRUE;