Shader Model 3 寄存器

http://msdn.microsoft.com/en-us/library/bb509656(v=VS.85).aspx

 

Registers - vs_3_0

This section contains reference information for the input and output registers implemented by vertex shader version 3_0.

Input Registers

Register	Name	Count	R/W	# Read ports	# Reads / inst	Dimension	RelAddr	Defaults	Requires DCL
v#	Input Register	16	R	1	Unlimited	4	a0/aL	See note 1	Yes
r#	Temporary Register	32	R/W	3	Unlimited	4	No	None	No
c#	Constant Float Register	See note 2	R	1	Unlimited	4	a0/aL	(0, 0, 0, 0)	No
a0	Address Register	1	R/W	1	Unlimited	4	No	None	No
b#	Constant Boolean Register	16	R	1	1	1	No	FALSE	No
i#	Constant Integer Register	16	R	1	1	4	No	(0, 0, 0, 0)	No
aL	Loop Counter Register	1	R	1	Unlimited	1	No	None	No
p0	Predicate Register	1	R/W	1	1	4	no	none	no
s#	Sampler (Direct3D 9 asm-vs)	4	R	1	1	4	No	See note 3	Yes

 

Notes:

1. Partial (0, 0, 0, 1) - If only a subset of channels are updated, the remaining channels will default to (0, 0, 0, 1).
2. Equal to D3DCAPS9.MaxVertexShaderConst (at least 256 for vs_3_0).
3. Defaults for sampler lookup exist, but values depend on texture format.

Output Registers

Output registers have been collapsed into 12 o# (output) registers. These can be used for anything the user wants to interpolate for the pixel shader: texture coordinates, colors, fog, etc.

Register	Name	Count	R/W	Dimension	RelAddr	Defaults	Requires DCL
o#	Output Register	12	W	4	aL	None	Yes

 

 

 

 

 

 

ps_3_0 Registers

Pixel shaders depend on registers to get vertex data, to output pixel data, to hold temporary results during calculations, and to identify texture sampling stages. There are several types of registers, each with a unique functionality. This section contains reference information for the input and output registers implemented by pixel shader version 3_0.

New Registers

Input Register

The Input Registers (v#) are now fully floating point and the Texture Coordinate Registers (t#) have been consolidated into it. The dcl_semantics (sm3 - ps asm) at the top of the shader is used to describe what is containted in a particular Input_Register. A semantic for the pixel types is introduced (analogous to the vertex side) for this model. No clamping is performed when the input registers are defined as colors (like texture coordinates). The evaluation of the registers defined as color differs from the texture coordinates when multisampling.

Face Register

The face register (vFace) is new for this model. This is a floating point scalar register that will eventually contain the primitive area. In ps_3_0, however, only the sign of this register is valid. Hence, if the value is less than zero (the sign bit is set negative) the primitive is the back face (the area is negative, counterclockwise). Therefore, in ps_3_0 it only makes sense to compare this register against 0 (> 0 or < 0). Inside the pixel shader, the application can make a decision as to which lighting technique to use. Two-sided lighting can be achieved this way. This register requires a declaration, so undeclared usage will be flagged as an error. For lines and point primitives, this register is undefined. The face register can only be used as condition with the following instructions: setp_comp - ps, if_comp - ps, or break_comp - ps.

Loop Counter Register

The Loop Counter Register (aL) is new for this model. It automatically gets incremented in each execution of the loop - ps/endloop - ps block. It can be used in the block for relative addressing if needed. It is invalid to use Loop Counter Register outside the loop.

Position Register

The Position Register (vPos) is new for this model. It contains the current pixels (x, y) in the corresponding channels. The (z, w) channels are undefined. This register requires a declaration, so undeclared usage will be flagged as an error. When declared, this register must have exactly one of the following masks: .x, .y, .xy.

Input Register Types

Register	Name	Count	R/W	# Read ports	# Reads/inst	Dimension	RelAddr	Defaults	Requires DCL
v#	Input Register	10	R	1	Unlimited	4	aL	None	Yes
r#	Temporary Register	32	R/W	3	Unlimited	4	No	None	No
c#	Constant Float Register	224	R	1	Unlimited	4	No	0000	No
i#	Constant Integer Register	16	R	1	1	4	No	0000	No
b#	Constant Boolean Register	16	R	1	1	1	No	FALSE	No
p0	Predicate Register	1	R	1	1	1	No	None	No
s#	Sampler (Direct3D 9 asm-ps)	16	R	1	1	4	No	See note 1	Yes
vFace	Face_Register	1	R	1	Unlimited	1	No	None	Yes
vPos	Position_Register	1	R	1	Unlimited	4	No	None	Yes
aL	Loop_Counter_Register	1	R	1	Unlimited	1	n/a	None	No

 

Notes:

• Defaults for sampler lookups exist, but values depend on texture format.

The number of readports is the number of different registers (for each register type) that can be read in a single instruction.

Output Register Types

Register	Name	Count	R/W	Dimension	RelAddr	Defaults	Requires DCL
oC#	Output Color Register	See Multiple-element Textures (Direct3D 9)	W	4	No	None	No
oDepth	Output Depth Register	1	W	1	No	None	No